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port-arm/44004: NetBSD marvell kirkwood rtc driver
>Number: 44004
>Category: port-arm
>Synopsis: NetBSD marvell kirkwood rtc driver
>Confidential: no
>Severity: non-critical
>Priority: low
>Responsible: port-arm-maintainer
>State: open
>Class: change-request
>Submitter-Id: net
>Arrival-Date: Tue Oct 26 22:55:00 +0000 2010
>Originator: Brett Slager
>Release: NetBSD current
>Organization:
>Environment:
NetBSD current on SHEEVAPLUG/GURUPLUG
>Description:
NetBSD has no driver for the rtc unit on Marvell Kirkwood SoCs
>How-To-Repeat:
Notice your Kirkwood NetBSD system doesn't keep time between boots.
>Fix:
Patches for rtc driver:
Index: sys/arch/arm/marvell/files.marvell
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/marvell/files.marvell,v
retrieving revision 1.2
diff -u -r1.2 files.marvell
--- sys/arch/arm/marvell/files.marvell 6 Oct 2010 05:24:01 -0000 1.2
+++ sys/arch/arm/marvell/files.marvell 26 Oct 2010 22:24:02 -0000
@@ -28,6 +28,11 @@
attach mvsoctmr at mvsoc
file arch/arm/marvell/mvsoctmr.c mvsoctmr
+# RTC
+device mvsocrtc
+attach mvsocrtc at mvsoc
+file arch/arm/marvell/mvsocrtc.c mvsocrtc
+
# PCI Express Interface
attach mvpex at mvsoc with mvpex_mbus
Index: sys/arch/arm/marvell/mvsoc.c
===================================================================
RCS file: /cvsroot/src/sys/arch/arm/marvell/mvsoc.c,v
retrieving revision 1.1
diff -u -r1.1 mvsoc.c
--- sys/arch/arm/marvell/mvsoc.c 3 Oct 2010 05:49:24 -0000 1.1
+++ sys/arch/arm/marvell/mvsoc.c 26 Oct 2010 22:24:03 -0000
@@ -301,6 +301,7 @@
#if defined(KIRKWOOD)
{ KIRKWOOD(88F6180),"mvsoctmr",0, MVSOC_TMR_BASE, IRQ_DEFAULT },
{ KIRKWOOD(88F6180),"mvsocgpp",0, MVSOC_GPP_BASE, KIRKWOOD_IRQ_GPIOLO7_0},
+ { KIRKWOOD(88F6180),"mvsocrtc",0, KIRKWOOD_RTC_BASE,IRQ_DEFAULT },
{ KIRKWOOD(88F6180),"com", 0, MVSOC_COM0_BASE, KIRKWOOD_IRQ_UART0INT },
{ KIRKWOOD(88F6180),"com", 1, MVSOC_COM1_BASE, KIRKWOOD_IRQ_UART1INT },
{ KIRKWOOD(88F6180),"ehci", 0, KIRKWOOD_USB_BASE,KIRKWOOD_IRQ_USB0CNT },
@@ -313,6 +314,7 @@
{ KIRKWOOD(88F6192),"mvsoctmr",0, MVSOC_TMR_BASE, IRQ_DEFAULT },
{ KIRKWOOD(88F6192),"mvsocgpp",0, MVSOC_GPP_BASE, KIRKWOOD_IRQ_GPIOLO7_0},
+ { KIRKWOOD(88F6192),"mvsocrtc",0, KIRKWOOD_RTC_BASE,IRQ_DEFAULT },
{ KIRKWOOD(88F6192),"com", 0, MVSOC_COM0_BASE, KIRKWOOD_IRQ_UART0INT },
{ KIRKWOOD(88F6192),"com", 1, MVSOC_COM1_BASE, KIRKWOOD_IRQ_UART1INT },
{ KIRKWOOD(88F6192),"ehci", 0, KIRKWOOD_USB_BASE,KIRKWOOD_IRQ_USB0CNT },
@@ -327,6 +329,7 @@
{ KIRKWOOD(88F6281),"mvsoctmr",0, MVSOC_TMR_BASE, IRQ_DEFAULT },
{ KIRKWOOD(88F6281),"mvsocgpp",0, MVSOC_GPP_BASE, KIRKWOOD_IRQ_GPIOLO7_0},
+ { KIRKWOOD(88F6281),"mvsocrtc",0, KIRKWOOD_RTC_BASE,IRQ_DEFAULT },
{ KIRKWOOD(88F6281),"com", 0, MVSOC_COM0_BASE, KIRKWOOD_IRQ_UART0INT },
{ KIRKWOOD(88F6281),"com", 1, MVSOC_COM1_BASE, KIRKWOOD_IRQ_UART1INT },
{ KIRKWOOD(88F6281),"ehci", 0, KIRKWOOD_USB_BASE,KIRKWOOD_IRQ_USB0CNT },
Index: sys/arch/evbarm/conf/SHEEVAPLUG
===================================================================
RCS file: /cvsroot/src/sys/arch/evbarm/conf/SHEEVAPLUG,v
retrieving revision 1.1
diff -u -r1.1 SHEEVAPLUG
--- sys/arch/evbarm/conf/SHEEVAPLUG 2 Oct 2010 06:15:52 -0000 1.1
+++ sys/arch/evbarm/conf/SHEEVAPLUG 26 Oct 2010 22:24:03 -0000
@@ -218,6 +218,9 @@
# On-chip Timers
mvsoctmr* at mvsoc? offset ? irq ?
+# On-chip RTC
+mvsocrtc* at mvsoc? offset ? irq ?
+
# On-chip SD/MMC Interface
mvsdio* at mvsoc? offset ? irq ?
sdmmc* at mvsdio?
===================================================================
--- /dev/null 2010-10-26 03:33:41.000000000 -0500
+++ sys/arch/arm/marvell/mvsocrtcreg.h 2010-10-26 17:21:10.000000000 -0500
@@ -0,0 +1,57 @@
+/* $NetBSD$ */
+
+/*-
+ * Copyright (c) 2010 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _MVSOCRTCREG_H_
+#define _MVSOCRTCREG_H_
+
+#define MVSOCRTC_SIZE 0x18
+
+#define MVSOCRTC_TIME 0x00
+#define MVSOCRTC_SECOND_OFFSET 0
+#define MVSOCRTC_SECOND_MASK 0x7f
+#define MVSOCRTC_MINUTE_OFFSET 8
+#define MVSOCRTC_MINUTE_MASK 0x7f
+#define MVSOCRTC_HOUR_OFFSET 16
+#define MVSOCRTC_HOUR_MASK 0x3f
+#define MVSOCRTC_WDAY_OFFSET 24
+#define MVSOCRTC_WDAY_MASK 0x07
+
+#define MVSOCRTC_DATE 0x04
+#define MVSOCRTC_DAY_OFFSET 0
+#define MVSOCRTC_DAY_MASK 0x3f
+#define MVSOCRTC_MONTH_OFFSET 8
+#define MVSOCRTC_MONTH_MASK 0x3f
+#define MVSOCRTC_YEAR_OFFSET 16
+#define MVSOCRTC_YEAR_MASK 0xff
+
+#define MVSOCRTC_ALARMTIME 0x08
+#define MVSOCRTC_ALARMDATE 0x0c
+#define MVSOCRTC_INTMASK 0x10
+#define MVSOCRTC_INTCAUSE 0x14
+
+#endif /* ! _MVSOCRTCREG_H_ */
===================================================================
--- /dev/null 2010-10-26 03:33:41.000000000 -0500
+++ sys/arch/arm/marvell/mvsocrtc.c 2010-10-26 17:19:57.000000000 -0500
@@ -0,0 +1,186 @@
+/* $NetBSD$ */
+
+/*-
+ * Copyright (c) 2010 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Driver for real time clock unit on Marvell kirkwood and possibly other
+ * SoCs. Supports only the time/date keeping functions. No support for
+ * the rtc unit alarm / interrupt functions.
+ *
+ * Written 10/2010 by Brett Slager -- all rights assigned to the NetBSD
+ * Foundation.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/kernel.h>
+
+#include <dev/clock_subr.h>
+
+#include <machine/bus.h>
+
+#include <arm/marvell/mvsocrtcreg.h>
+#include <dev/marvell/marvellvar.h>
+
+struct mvsocrtc_softc {
+ device_t sc_dev;
+ bus_space_tag_t sc_iot;
+ bus_space_handle_t sc_ioh;
+ struct todr_chip_handle sc_todr;
+};
+
+static int mvsocrtc_match(device_t, cfdata_t, void *);
+static void mvsocrtc_attach(device_t, device_t, void *);
+static int mvsocrtc_todr_gettime(todr_chip_handle_t, struct clock_ymdhms *);
+static int mvsocrtc_todr_settime(todr_chip_handle_t, struct clock_ymdhms *);
+
+CFATTACH_DECL_NEW(mvsocrtc, sizeof(struct mvsocrtc_softc), mvsocrtc_match,
+ mvsocrtc_attach, NULL, NULL);
+
+static int
+mvsocrtc_match(device_t parent, cfdata_t cf, void *aux)
+{
+ struct marvell_attach_args *mva;
+
+ mva = aux;
+
+ if (strcmp(mva->mva_name, cf->cf_name) != 0)
+ return 0;
+ if (mva->mva_offset == MVA_OFFSET_DEFAULT)
+ return 0;
+
+ mva->mva_size = MVSOCRTC_SIZE;
+ return 1;
+}
+
+static void
+mvsocrtc_attach(device_t parent, device_t self, void *aux)
+{
+ struct mvsocrtc_softc *sc;
+ struct marvell_attach_args *mva;
+
+ sc = device_private(self);
+ mva = aux;
+ sc->sc_dev = self;
+ sc->sc_iot = mva->mva_iot;
+
+ aprint_normal(": Marvell SoC Real Time Clock\n");
+ aprint_naive("\n");
+
+ if (bus_space_subregion(mva->mva_iot, mva->mva_ioh, mva->mva_offset,
+ mva->mva_size, &sc->sc_ioh)) {
+ aprint_error_dev(self, "failed to subregion register space\n");
+ return;
+ }
+
+ sc->sc_todr.cookie = sc;
+ sc->sc_todr.todr_gettime = NULL;
+ sc->sc_todr.todr_settime = NULL;
+ sc->sc_todr.todr_gettime_ymdhms = mvsocrtc_todr_gettime;
+ sc->sc_todr.todr_settime_ymdhms = mvsocrtc_todr_settime;
+ sc->sc_todr.todr_setwen = NULL;
+
+ todr_attach(&sc->sc_todr);
+}
+
+static int
+mvsocrtc_todr_gettime(todr_chip_handle_t ch, struct clock_ymdhms *dt)
+{
+ struct mvsocrtc_softc *sc;
+ int tried;
+ uint32_t rtcdate, rtctime;
+ uint8_t rtcday, rtchour, rtcmin, rtcmonth, rtcsec, rtcyear;
+
+ sc = ch->cookie;
+ tried = 0;
+
+again:
+ /* read the rtc date and time registers */
+ rtcdate = bus_space_read_4(sc->sc_iot, sc->sc_ioh, MVSOCRTC_DATE);
+ rtctime = bus_space_read_4(sc->sc_iot, sc->sc_ioh, MVSOCRTC_TIME);
+
+ rtcyear = (rtcdate >> MVSOCRTC_YEAR_OFFSET) & MVSOCRTC_YEAR_MASK;
+ rtcmonth = (rtcdate >> MVSOCRTC_MONTH_OFFSET) & MVSOCRTC_MONTH_MASK;
+ rtcday = (rtcdate >> MVSOCRTC_DAY_OFFSET) & MVSOCRTC_DAY_MASK;
+
+ rtchour = (rtctime >> MVSOCRTC_HOUR_OFFSET) & MVSOCRTC_HOUR_MASK;
+ rtcmin = (rtctime >> MVSOCRTC_MINUTE_OFFSET) & MVSOCRTC_MINUTE_MASK;
+ rtcsec = (rtctime >> MVSOCRTC_SECOND_OFFSET) & MVSOCRTC_SECOND_MASK;
+
+ /*
+ * if seconds == 0, we may have read while the registers were
+ * updating. Read again to get consistant data.
+ */
+ if (rtcsec == 0 && !tried) {
+ tried = 1;
+ goto again;
+ }
+
+ /*
+ * Assume year "00" to be year 2000.
+ * XXXX this assumption will fail in 2100, but somehow I don't think
+ * I or the hardware will be functioning to see it.
+ */
+ dt->dt_year = FROMBCD(rtcyear) + 2000;
+ dt->dt_mon = FROMBCD(rtcmonth);
+ dt->dt_day = FROMBCD(rtcday);
+ dt->dt_hour = FROMBCD(rtchour);
+ dt->dt_min = FROMBCD(rtcmin);
+ dt->dt_sec = FROMBCD(rtcsec);
+
+ return 0;
+}
+
+static int
+mvsocrtc_todr_settime(todr_chip_handle_t ch, struct clock_ymdhms *dt)
+{
+ struct mvsocrtc_softc *sc;
+ uint32_t reg;
+
+ sc = ch->cookie;
+
+ /* compose & write time register contents */
+ reg = (TOBCD(dt->dt_sec) << MVSOCRTC_SECOND_OFFSET) |
+ (TOBCD(dt->dt_min) << MVSOCRTC_MINUTE_OFFSET) |
+ (TOBCD(dt->dt_hour) << MVSOCRTC_HOUR_OFFSET) |
+ (TOBCD(dt->dt_wday) << MVSOCRTC_WDAY_OFFSET);
+
+ bus_space_write_4(sc->sc_iot, sc->sc_ioh, MVSOCRTC_TIME, reg);
+
+ /* compose & write date register contents */
+ reg = (TOBCD(dt->dt_day) << MVSOCRTC_DAY_OFFSET) |
+ (TOBCD(dt->dt_mon) << MVSOCRTC_MONTH_OFFSET) |
+ (TOBCD(dt->dt_year % 100) << MVSOCRTC_YEAR_OFFSET);
+
+ bus_space_write_4(sc->sc_iot, sc->sc_ioh, MVSOCRTC_DATE, reg);
+
+ return 0;
+}
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