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Re: PR/43472 CVS commit: src/sys/arch/hpcmips/tx
The following reply was made to PR port-hpcmips/43472; it has been noted by
GNATS.
From: Izumi Tsutsui <tsutsui%ceres.dti.ne.jp@localhost>
To: sainio%t-online.de@localhost
Cc: gnats-bugs%NetBSD.org@localhost,
port-hpcmips-maintainer%NetBSD.org@localhost,
gnats-admin%NetBSD.org@localhost, netbsd-bugs%NetBSD.org@localhost,
tsutsui%ceres.dti.ne.jp@localhost
Subject: Re: PR/43472 CVS commit: src/sys/arch/hpcmips/tx
Date: Sat, 17 Jul 2010 00:46:19 +0900
Thanks, I've committed your fixes, but could you also try
the attached patch (for netbsd-5-0 branch)?
It's better to use newer MI softint(9) than callout(9)
for such deferred interrupt handlers.
---
Index: txcom.c
===================================================================
RCS file: /cvsroot/src/sys/arch/hpcmips/tx/txcom.c,v
retrieving revision 1.40
diff -u -r1.40 txcom.c
--- txcom.c 12 Jun 2008 16:50:53 -0000 1.40
+++ txcom.c 16 Jul 2010 15:42:54 -0000
@@ -99,8 +99,8 @@
struct tty *sc_tty;
struct txcom_chip *sc_chip;
- struct callout sc_txsoft_ch;
- struct callout sc_rxsoft_ch;
+ void *sc_txsoft_cookie;
+ void *sc_rxsoft_cookie;
u_int8_t *sc_tba; /* transmit buffer address */
int sc_tbc; /* transmit byte count */
@@ -272,6 +272,11 @@
tx_intr_establish(tc, TXCOMINTR(BREAK, slot), IST_EDGE, IPL_TTY,
txcom_break_intr, sc);
+ sc->sc_txsoft_cookie =
+ softint_establish(SOFTINT_SERIAL, txcom_txsoft, sc);
+ sc->sc_rxsoft_cookie =
+ softint_establish(SOFTINT_SERIAL, txcom_rxsoft, sc);
+
/*
* UARTA has external signal line. (its wiring is platform dependent)
*/
@@ -699,7 +704,7 @@
sc->sc_rbuf[sc->sc_rbput] = c;
sc->sc_rbput = (sc->sc_rbput + 1) % TXCOM_RING_MASK;
- callout_reset(&sc->sc_rxsoft_ch, 1, txcom_rxsoft, sc);
+ softint_schedule(sc->sc_rxsoft_cookie);
return 0;
}
@@ -748,7 +753,7 @@
sc->sc_tbc--;
sc->sc_tba++;
} else {
- callout_reset(&sc->sc_rxsoft_ch, 1, txcom_txsoft, sc);
+ softint_schedule(sc->sc_txsoft_cookie);
}
return 0;
---
Izumi Tsutsui
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