Re: PR/38011 CVS commit: src/sys/dev/pci

[Kurt Schreiner <ks%ub.uni-mainz.de@localhost>]

The following reply was made to PR kern/38011; it has been noted by GNATS.

From: Kurt Schreiner <ks%ub.uni-mainz.de@localhost>
To: gnats-bugs%NetBSD.org@localhost
Cc: mrg%NetBSD.org@localhost, gnats-admin%NetBSD.org@localhost, 
netbsd-bugs%NetBSD.org@localhost
Subject: Re: PR/38011 CVS commit: src/sys/dev/pci
Date: Wed, 23 Dec 2009 21:36:30 +0100

 On Wed, Dec 23, 2009 at 12:15:06AM +0000, matthew green wrote:
 > The following reply was made to PR kern/38011; it has been noted by GNATS.
 > 
 > From: matthew green <mrg%netbsd.org@localhost>
 > To: gnats-bugs%gnats.NetBSD.org@localhost
 > Cc: 
 > Subject: PR/38011 CVS commit: src/sys/dev/pci
 > Date: Wed, 23 Dec 2009 00:11:36 +0000
 > 
 >  Module Name:        src
 >  Committed By:       mrg
 >  Date:               Wed Dec 23 00:11:36 UTC 2009
 >  
 >  Modified Files:
 >      src/sys/dev/pci: viaide.c
 >  
 >  Log Message:
 >  enable mem space if it isn't already enabled.  several bioses leave
 >  this not enabled, and viaide kind of depends upon it.
 >  
 >  fixes viaide(4) on several machines.
 >  
 >  idea from PR 38011, but reworked a little.
 Confirmed to work on the system (Sun Ultra40) I did the "hack" for (see
 excerpts from dmesg below). From my POV the PR can be closed.
 
 viaide0 at pci0 dev 6 function 0: NVIDIA nForce4 IDE Controller (rev. 0xf2)
 viaide0: bus-master DMA support present
 viaide0: primary channel configured to compatibility mode
 viaide0: primary channel interrupting at ioapic0 pin 14
 atabus0 at viaide0 channel 0
 viaide0: secondary channel configured to compatibility mode
 viaide0: secondary channel interrupting at ioapic0 pin 15
 atabus1 at viaide0 channel 1
 viaide1 at pci0 dev 7 function 0: NVIDIA nForce4 Serial ATA Controller (rev. 
0xf3)
 viaide1: bus-master DMA support present
 viaide1: primary channel wired to native-PCI mode
 LSI1: Picked IRQ 23 with weight 0
 viaide1: using ioapic0 pin 23 for native-PCI interrupt
 atabus2 at viaide1 channel 0
 viaide1: secondary channel wired to native-PCI mode
 atabus3 at viaide1 channel 1
 viaide2 at pci0 dev 8 function 0: NVIDIA nForce4 Serial ATA Controller (rev. 
0xf3)
 viaide2: bus-master DMA support present
 viaide2: primary channel wired to native-PCI mode
 LTID: Picked IRQ 20 with weight 1
 viaide2: using ioapic0 pin 20 for native-PCI interrupt
 atabus4 at viaide2 channel 0
 viaide2: secondary channel wired to native-PCI mode
 atabus5 at viaide2 channel 1
 ppb0 at pci0 dev 9 function 0: NVIDIA nForce4 PCI Host Bridge (rev. 0xf2)
 pci1 at ppb0 bus 1
 pci1: i/o space, memory space enabled
 [...]
 pci4 at mainbus0 bus 128
 pci4: i/o space, memory space enabled, rd/line, rd/mult, wr/inv ok
 NVIDIA nForce4 Memory Controller (miscellaneous memory, revision 0xa3) at pci4 
dev 0 function 0 not conf
 igured
 NVIDIA product 0x00d3 (miscellaneous memory, revision 0xf3) at pci4 dev 1 
function 0 not configured
 viaide3 at pci4 dev 7 function 0: NVIDIA nForce4 Serial ATA Controller (rev. 
0xf3)
 viaide3: bus-master DMA support present
 viaide3: primary channel wired to native-PCI mode
 LTID: Picked IRQ 44 with weight 0
 viaide3: using ioapic1 pin 20 for native-PCI interrupt
 atabus6 at viaide3 channel 0
 viaide3: secondary channel wired to native-PCI mode
 atabus7 at viaide3 channel 1
 viaide4 at pci4 dev 8 function 0: NVIDIA nForce4 Serial ATA Controller (rev. 
0xf3)
 viaide4: bus-master DMA support present
 viaide4: primary channel wired to native-PCI mode
 LSI1: Picked IRQ 45 with weight 0
 viaide4: using ioapic1 pin 21 for native-PCI interrupt
 atabus8 at viaide4 channel 0
 viaide4: secondary channel wired to native-PCI mode
 atabus9 at viaide4 channel 1
 [...]
 atapibus0 at atabus0: 2 targets
 cd0 at atapibus0 drive 0: <MATSHITADVD-RAM UJ-845S, , D100> cdrom removable
 viaide1 port 1: device present, speed: 3.0Gb/s
 viaide2 port 0: device present, speed: 3.0Gb/s
 viaide2 port 1: device present, speed: 3.0Gb/s
 viaide1 port 0: device present, speed: 1.5Gb/s
 cd0: 32-bit data port
 cd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 2 (Ultra/33)
 cd0(viaide0:0:0): using PIO mode 4, Ultra-DMA mode 2 (Ultra/33) (using DMA)
 wd0 at atabus2 drive 0: <ST3250823AS>
 wd0: drive supports 16-sector PIO transfers, LBA48 addressing
 wd0: 232 GB, 484521 cyl, 16 head, 63 sec, 512 bytes/sect x 488397168 sectors
 wd0: 32-bit data port
 wd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 6 (Ultra/133)
 wd0(viaide1:0:0): using PIO mode 4, Ultra-DMA mode 6 (Ultra/133) (using DMA)
 wd1 at atabus3 drive 0: <HITACHI HDS7225SBSUN250G 0548N68BPE>
 wd1: drive supports 16-sector PIO transfers, LBA48 addressing
 wd1: 232 GB, 484514 cyl, 16 head, 63 sec, 512 bytes/sect x 488390625 sectors
 wd1: 32-bit data port
 wd1: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 6 (Ultra/133)
 wd1(viaide1:1:0): using PIO mode 4, Ultra-DMA mode 6 (Ultra/133) (using DMA)
 wd2 at atabus4 drive 0: <SEAGATE ST32500NSSUN250G 0740B56A8Y>
 wd2: drive supports 16-sector PIO transfers, LBA48 addressing
 wd2: 232 GB, 484514 cyl, 16 head, 63 sec, 512 bytes/sect x 488390625 sectors
 wd2: 32-bit data port
 wd2: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 6 (Ultra/133)
 wd2(viaide2:0:0): using PIO mode 4, Ultra-DMA mode 6 (Ultra/133) (using DMA)
 wd3 at atabus5 drive 0: <SEAGATE ST32500NSSUN250G 0740B56AAZ>
 wd3: drive supports 16-sector PIO transfers, LBA48 addressing
 wd3: 232 GB, 484514 cyl, 16 head, 63 sec, 512 bytes/sect x 488390625 sectors
 wd3: 32-bit data port
 wd3: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 6 (Ultra/133)
 wd3(viaide2:1:0): using PIO mode 4, Ultra-DMA mode 6 (Ultra/133) (using DMA)
 
 Kurt