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Re: port-i386/41624: atheros-card works in 4.0 but not in 5.0



The following reply was made to PR port-i386/41624; it has been noted by GNATS.

From: "Nino on NetBSD 4.0" <nbsdold%gmx.net@localhost>
To: dholland-bugs%netbsd.org@localhost, gnats-bugs%NetBSD.org@localhost, 
netbsd-bugs%netbsd.org@localhost,
 gnats-admin%netbsd.org@localhost, port-i386-maintainer%netbsd.org@localhost
Cc: 
Subject: Re: port-i386/41624: atheros-card works in 4.0 but not in 5.0
Date: Mon, 06 Jul 2009 13:24:51 +0200

 Dear David,
 
 Now ath0 DOES work. It was quite interesting, I attribute it to a quirky card 
(it blue-screened Windows, it said something about "memory parity error", which 
was definitely incorrect, as I tried several RAM-chips). So not a problem of 
NetBSD.
 
 If you want to know details, I am sending you below a) the dmesg while it was 
NOT working, and b) the dmesg when it WAS working; possibly it can be of help 
for other cases in the future. What I did to solve it was: reboot in Windows 
after taking out the wireless-chip, then put in the chip when Windows is 
running, then reboot Windows with the chip inside, then turn on wireless (using 
the button on the laptop), then shutdown windows and boot into NetBSD.
 
 A) NOT WORKING
 
 trpin 0x1, i/o on, mem off, no quirks)
 siside0: Silicon Integrated Systems 96X UDMA6661 IDE controller (rev. 0x00)
 siside0: bus-master DMA support present
 siside0: primary channel configured to compatibility mode
 siside0: primary channel interrupting at ioapic0 pin 14
 atabus0 at siside0 channel 0
 siside0: secondary channel configured to compatibility mode
 siside0: secondary channel interrupting at ioapic0 pin 15
 atabus1 at siside0 channel 1
 Silicon Integrated System product 0x7013 (modem communications, revision 0xa0) 
at pci0 dev 2 function 6: PCI configuration registers:
   Common header:
     0x00: 0x70131039 0x02900005 0x070300a0 0x0000ad00
 
     Vendor Name: Silicon Integrated System (0x1039)
     Device ID: 0x7013
     Command register: 0x0005
       I/O space accesses: on
       Memory space accesses: off
       Bus mastering: on
       Special cycles: off
       MWI transactions: off
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x0290
       Capability List support: on
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: communications (0x07)
     Subclass Name: modem (0x03)
     Interface: 0x00
     Revision ID: 0xa0
     BIST: 0x00
     Header Type: 0x00 (0x00)
     Latency Timer: 0xad
     Cache Line Size: 0x00
 
   Type 0 ("normal" device) header:
     0x10: 0x00001401 0x00001081 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00821025
     0x30: 0x00000000 0x00000048 0x00000000 0x0b340303
 
     Base address register at 0x10
       type: 32-bit i/o
       base: 0x00001400, size: 0x00000100
     Base address register at 0x14
       type: 32-bit i/o
       base: 0x00001080, size: 0x00000080
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x1025
     Subsystem ID: 0x0082
     Expansion ROM Base Address: 0x00000000
     Capability list pointer: 0x48
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x0b
     Minimum Grant: 0x34
     Interrupt pin: 0x03 (pin C)
     Interrupt line: 0x03
 
   Capability register at 0x48
     type: 0x01 (Power Management, rev. 1.0)
 
   PCI Power Management Capabilities Register
     Capabilities register: 0xc642
       Version: 1.1
       PME# clock: off
       Device specific initialization: off
       3.3V auxiliary current: 55 mA
       D1 power management state support: on
       D2 power management state support: on
       PME# support: 0x18
     Control/status register: 0x0000
       Power state: D0
       PCI Express reserved: off
       No soft reset: off
       PME# assertion disabled
       PME# status: off
 
   Device-dependent header:
     0x40: 0x00000002 0x00000000 0xc6420001 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000002 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 Silicon Integrated System product 0x7013 (modem communications, revision 0xa0) 
at pci0 dev 2 function 6 (tag 0x80001600, intrtag 0x80001600, intrswiz 0, 
intrpin 0x3, i/o on, mem off, no quirks) not configured
 auich0 at pci0 dev 2 function 7: PCI configuration registers:
   Common header:
     0x00: 0x70121039 0x02900005 0x040100a0 0x0000ad00
 
     Vendor Name: Silicon Integrated System (0x1039)
     Device Name: 7012 AC-97 Sound (0x7012)
     Command register: 0x0005
       I/O space accesses: on
       Memory space accesses: off
       Bus mastering: on
       Special cycles: off
       MWI transactions: off
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x0290
       Capability List support: on
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: multimedia (0x04)
     Subclass Name: audio (0x01)
     Interface: 0x00
     Revision ID: 0xa0
     BIST: 0x00
     Header Type: 0x00 (0x00)
     Latency Timer: 0xad
     Cache Line Size: 0x00
 
   Type 0 ("normal" device) header:
     0x10: 0x00001c01 0x00001801 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00821025
     0x30: 0x00000000 0x00000048 0x00000000 0x0b340303
 
     Base address register at 0x10
       type: 32-bit i/o
       base: 0x00001c00, size: 0x00000100
     Base address register at 0x14
       type: 32-bit i/o
       base: 0x00001800, size: 0x00000080
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x1025
     Subsystem ID: 0x0082
     Expansion ROM Base Address: 0x00000000
     Capability list pointer: 0x48
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x0b
     Minimum Grant: 0x34
     Interrupt pin: 0x03 (pin C)
     Interrupt line: 0x03
 
   Capability register at 0x48
     type: 0x01 (Power Management, rev. 1.0)
 
   PCI Power Management Capabilities Register
     Capabilities register: 0xc642
       Version: 1.1
       PME# clock: off
       Device specific initialization: off
       3.3V auxiliary current: 55 mA
       D1 power management state support: on
       D2 power management state support: on
       PME# support: 0x18
     Control/status register: 0x0000
       Power state: D0
       PCI Express reserved: off
       No soft reset: off
       PME# assertion disabled
       PME# status: off
 
   Device-dependent header:
     0x40: 0x00000004 0x00000000 0xc6420001 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000002 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 Silicon Integrated System 7012 AC-97 Sound (audio multimedia, revision 0xa0) 
at ? dev 2 function 7 (tag 0x80001700, intrtag 0x80001700, intrswiz 0, intrpin 
0x3, i/o on, mem off, no quirks): SiS 7012 AC-97 Audio
 auich0: interrupting at ioapic0 pin 18
 auich0: ac97: Avance Logic unknown (0x414c4770) codec; headphone, 20 bit DAC, 
18 bit ADC, no 3D stereo
 auich0: ac97: ext id a07<AC97_23,AMAP,SPDIF,DRA,VRA>
 ohci0 at pci0 dev 3 function 0: PCI configuration registers:
   Common header:
     0x00: 0x70011039 0x82800017 0x0c03100f 0x00804000
 
     Vendor Name: Silicon Integrated System (0x1039)
     Device Name: 5597/5598 USB host controller (0x7001)
     Command register: 0x0017
       I/O space accesses: on
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: on
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x8280
       Capability List support: off
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: on
     Class Name: serial bus (0x0c)
     Subclass Name: USB (0x03)
     Interface: 0x10
     Revision ID: 0x0f
     BIST: 0x00
     Header Type: 0x00+multifunction (0x80)
     Latency Timer: 0x40
     Cache Line Size: 0x00
 
   Type 0 ("normal" device) header:
     0x10: 0xe2000000 0x00000000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00821025
     0x30: 0x00000000 0x00000000 0x00000000 0x50000109
 
     Base address register at 0x10
       type: 32-bit nonprefetchable memory
       base: 0xe2000000, size: 0x00001000
     Base address register at 0x14
       not implemented(?)
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x1025
     Subsystem ID: 0x0082
     Expansion ROM Base Address: 0x00000000
     Reserved @ 0x34: 0x00000000
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x50
     Minimum Grant: 0x00
     Interrupt pin: 0x01 (pin A)
     Interrupt line: 0x09
 
   Device-dependent header:
     0x40: 0x00000000 0x0001ac5c 0x0000023f 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0xc9c20001
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 Silicon Integrated System 5597/5598 USB host controller (USB serial bus, 
interface 0x10, revision 0x0f) at ? dev 3 function 0 (tag 0x80001800, intrtag 
0x80001800, intrswiz 0, intrpin 0x1, i/o on, mem on, no quirks): Silicon 
Integrated System 5597/5598 USB host controller (rev. 0x0f)
 ohci0: interrupting at ioapic0 pin 20
 ohci0: OHCI version 1.0, legacy support
 usb0 at ohci0: USB revision 1.0
 ohci1 at pci0 dev 3 function 1: PCI configuration registers:
   Common header:
     0x00: 0x70011039 0x82800017 0x0c03100f 0x00004000
 
     Vendor Name: Silicon Integrated System (0x1039)
     Device Name: 5597/5598 USB host controller (0x7001)
     Command register: 0x0017
       I/O space accesses: on
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: on
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x8280
       Capability List support: off
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: on
     Class Name: serial bus (0x0c)
     Subclass Name: USB (0x03)
     Interface: 0x10
     Revision ID: 0x0f
     BIST: 0x00
     Header Type: 0x00 (0x00)
     Latency Timer: 0x40
     Cache Line Size: 0x00
 
   Type 0 ("normal" device) header:
     0x10: 0xe2001000 0x00000000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00821025
     0x30: 0x00000000 0x00000000 0x00000000 0x5000020b
 
     Base address register at 0x10
       type: 32-bit nonprefetchable memory
       base: 0xe2001000, size: 0x00001000
     Base address register at 0x14
       not implemented(?)
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x1025
     Subsystem ID: 0x0082
     Expansion ROM Base Address: 0x00000000
     Reserved @ 0x34: 0x00000000
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x50
     Minimum Grant: 0x00
     Interrupt pin: 0x02 (pin B)
     Interrupt line: 0x0b
 
   Device-dependent header:
     0x40: 0x00000000 0x0001ac5c 0x0000023f 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0xc9c20001
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 Silicon Integrated System 5597/5598 USB host controller (USB serial bus, 
interface 0x10, revision 0x0f) at ? dev 3 function 1 (tag 0x80001900, intrtag 
0x80001900, intrswiz 0, intrpin 0x2, i/o on, mem on, no quirks): Silicon 
Integrated System 5597/5598 USB host controller (rev. 0x0f)
 ohci1: interrupting at ioapic0 pin 21
 ohci1: OHCI version 1.0, legacy support
 usb1 at ohci1: USB revision 1.0
 ehci0 at pci0 dev 3 function 3: PCI configuration registers:
   Common header:
     0x00: 0x70021039 0x02900006 0x0c032000 0x00004000
 
     Vendor Name: Silicon Integrated System (0x1039)
     Device Name: 7002 USB 2.0 host controller (0x7002)
     Command register: 0x0006
       I/O space accesses: off
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: off
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x0290
       Capability List support: on
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: serial bus (0x0c)
     Subclass Name: USB (0x03)
     Interface: 0x20
     Revision ID: 0x00
     BIST: 0x00
     Header Type: 0x00 (0x00)
     Latency Timer: 0x40
     Cache Line Size: 0x00
 
   Type 0 ("normal" device) header:
     0x10: 0xe2002000 0x00000000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00821025
     0x30: 0x00000000 0x00000050 0x00000000 0x5000040a
 
     Base address register at 0x10
       type: 32-bit nonprefetchable memory
       base: 0xe2002000, size: 0x00001000
     Base address register at 0x14
       not implemented(?)
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x1025
     Subsystem ID: 0x0082
     Expansion ROM Base Address: 0x00000000
     Capability list pointer: 0x50
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x50
     Minimum Grant: 0x00
     Interrupt pin: 0x04 (pin D)
     Interrupt line: 0x0a
 
   Capability register at 0x50
     type: 0x01 (Power Management, rev. 1.0)
 
   PCI Power Management Capabilities Register
     Capabilities register: 0xc9c2
       Version: 1.1
       PME# clock: off
       Device specific initialization: off
       3.3V auxiliary current: 375 mA
       D1 power management state support: off
       D2 power management state support: off
       PME# support: 0x19
     Control/status register: 0x0000
       Power state: D0
       PCI Express reserved: off
       No soft reset: off
       PME# assertion disabled
       PME# status: off
 
   Device-dependent header:
     0x40: 0x08000000 0x00000000 0x00000000 0x00000000
     0x50: 0xc9c20001 0x00000000 0x2100000a 0x00000000
     0x60: 0x007f2020 0x00000000 0x00000000 0x00000000
     0x70: 0x00000001 0xc0080000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 Silicon Integrated System 7002 USB 2.0 host controller (USB serial bus, 
interface 0x20) at ? dev 3 function 3 (tag 0x80001b00, intrtag 0x80001b00, 
intrswiz 0, intrpin 0x4, i/o off, mem on, no quirks): Silicon Integrated System 
7002 USB 2.0 host controller (rev. 0x00)
 ehci0: interrupting at ioapic0 pin 23
 ehci0: EHCI version 1.0
 ehci0: companion controllers, 3 ports each: ohci0 ohci1
 usb2 at ehci0: USB revision 2.0
 sip0 at pci0 dev 4 function 0: PCI configuration registers:
   Common header:
     0x00: 0x09001039 0x02900007 0x02000091 0x0000ad00
 
     Vendor Name: Silicon Integrated System (0x1039)
     Device Name: 900 10/100 Ethernet (0x0900)
     Command register: 0x0007
       I/O space accesses: on
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: off
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x0290
       Capability List support: on
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: network (0x02)
     Subclass Name: ethernet (0x00)
     Interface: 0x00
     Revision ID: 0x91
     BIST: 0x00
     Header Type: 0x00 (0x00)
     Latency Timer: 0xad
     Cache Line Size: 0x00
 
   Type 0 ("normal" device) header:
     0x10: 0x00002001 0xe2003000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00821025
     0x30: 0x00000000 0x00000040 0x00000000 0x0b340105
 
     Base address register at 0x10
       type: 32-bit i/o
       base: 0x00002000, size: 0x00000100
     Base address register at 0x14
       type: 32-bit nonprefetchable memory
       base: 0xe2003000, size: 0x00001000
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x1025
     Subsystem ID: 0x0082
     Expansion ROM Base Address: 0x00000000
     Capability list pointer: 0x40
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x0b
     Minimum Grant: 0x34
     Interrupt pin: 0x01 (pin A)
     Interrupt line: 0x05
 
   Capability register at 0x40
     type: 0x01 (Power Management, rev. 1.0)
 
   PCI Power Management Capabilities Register
     Capabilities register: 0xfe02
       Version: 1.1
       PME# clock: off
       Device specific initialization: off
       3.3V auxiliary current: self-powered
       D1 power management state support: on
       D2 power management state support: on
       PME# support: 0x1f
     Control/status register: 0x0100
       Power state: D0
       PCI Express reserved: off
       No soft reset: off
       PME# assertion enabled
       PME# status: off
 
   Device-dependent header:
     0x40: 0xfe020001 0x00000100 0x00000000 0x00000000
     0x50: 0x00000001 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000091 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 Silicon Integrated System 900 10/100 Ethernet (ethernet network, revision 
0x91) at ? dev 4 function 0 (tag 0x80002000, intrtag 0x80002000, intrswiz 0, 
intrpin 0x1, i/o on, mem on, no quirks): SiS 900 10/100 Ethernet, rev 0x91
 sip0: interrupting at ioapic0 pin 19
 sip0: Ethernet address 00:16:36:3c:47:e0
 rlphy0 at sip0 phy 13: RTL8201L 10/100 media interface, rev. 1
 rlphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
 cbb0 at pci0 dev 6 function 0: PCI configuration registers:
   Common header:
     0x00: 0x14101524 0x02100007 0x06070001 0x00024000
 
     Vendor Name: ENE Technology (0x1524)
     Device Name: CB1410 CardBus Controller (0x1410)
     Command register: 0x0007
       I/O space accesses: on
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: off
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x0210
       Capability List support: on
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: off
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: bridge (0x06)
     Subclass Name: CardBus (0x07)
     Interface: 0x00
     Revision ID: 0x01
     BIST: 0x00
     Header Type: 0x02 (0x02)
     Latency Timer: 0x40
     Cache Line Size: 0x00
 
   Type 2 (PCI-CardBus bridge) header:
     0x10: 0x3be00000 0x020000a0 0x20020200 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00000000
     0x30: 0x00000000 0x00000000 0x00000000 0x03400105
     0x40: 0x00821025 0x000003e1
 
     Base address register at 0x10 (CardBus socket/ExCA registers)
       type: 32-bit nonprefetchable memory
       base: 0x3be00000, size: 0x00001000
     Capability list pointer: 0xa0
     Secondary status register: 0x0200
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: off
       Data parity error detection: off
       DEVSEL timing: medium (0x1)
       PCI target aborts terminate CardBus bus master transactions: off
       CardBus target aborts terminate PCI bus master transactions: off
       Bus initiator aborts terminate initiator transactions: off
       System error: off
       Parity error: off
     PCI bus number: 0x00
     CardBus bus number: 0x02
     Subordinate bus number: 0x02
     CardBus latency timer: 0x20
     CardBus memory region 0:
       base register:  0x00000000
       limit register: 0x00000000
     CardBus memory region 1:
       base register:  0x00000000
       limit register: 0x00000000
     CardBus I/O region 0:
       base register:  0x00000000
       limit register: 0x00000000
     CardBus I/O region 1:
       base register:  0x00000000
       limit register: 0x00000000
     Interrupt line: 0x05
     Interrupt pin: 0x01 (pin A)
     Bridge control register: 0x0340
       Parity error response: off
       CardBus SERR forwarding: off
       ISA enable: off
       VGA enable: off
       CardBus master abort reporting: off
       CardBus reset: on
       Functional interrupts routed by ExCA registers: off
       Memory window 0 prefetchable: on
       Memory window 1 prefetchable: on
       Write posting enable: off
     Subsystem vendor ID: 0x1025
     Subsystem ID: 0x0082
     Base address register at 0x44 (legacy-mode registers)
       type: 32-bit i/o
       base: 0x000003e0, size: 0x00000004
 
   Capability register at 0xa0
     type: 0x01 (Power Management, rev. 1.0)
 
   PCI Power Management Capabilities Register
     Capabilities register: 0xfe01
       Version: 1.0
       PME# clock: off
       Device specific initialization: off
       3.3V auxiliary current: self-powered
       D1 power management state support: on
       D2 power management state support: on
       PME# support: 0x1f
     Control/status register: 0x0100
       Power state: D0
       PCI Express reserved: off
       No soft reset: off
       PME# assertion enabled
       PME# status: off
 
   Device-dependent header:
     0x48: 0x00000000 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x0040d020 0x00000000 0x00000000 0x00001002
     0x90: 0x604402c0 0x00000000 0x00000000 0x00000000
     0xa0: 0xfe010001 0x00c00100 0x00000016 0x00000001
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00001000 0x00800080 0x10080600 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 ENE Technology CB1410 CardBus Controller (CardBus bridge, revision 0x01) at ? 
dev 6 function 0 (tag 0x80003000, intrtag 0x80003000, intrswiz 0, intrpin 0x1, 
i/o on, mem on, no quirks): ENE Technology CB1410 CardBus Controller (rev. 0x01)
 ath0 at pci0 dev 11 function 0: PCI configuration registers:
   Common header:
     0x00: 0x001a168c 0x82900016 0x02000001 0x00005004
 
     Vendor Name: Atheros Communications (0x168c)
     Device ID: 0x001a
     Command register: 0x0016
       I/O space accesses: off
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: on
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x8290
       Capability List support: on
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: on
     Class Name: network (0x02)
     Subclass Name: ethernet (0x00)
     Interface: 0x00
     Revision ID: 0x01
     BIST: 0x00
     Header Type: 0x00 (0x00)
     Latency Timer: 0x50
     Cache Line Size: 0x04
 
   Type 0 ("normal" device) header:
     0x10: 0xe2010000 0x00000000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00005001 0x04181468
     0x30: 0x00000000 0x00000044 0x00000000 0x1c0a0103
 
     Base address register at 0x10
       type: 32-bit nonprefetchable memory
       base: 0xe2010000, size: 0x00010000
     Base address register at 0x14
       not implemented(?)
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00005001
     Subsystem vendor ID: 0x1468
     Subsystem ID: 0x0418
     Expansion ROM Base Address: 0x00000000
     Capability list pointer: 0x44
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x1c
     Minimum Grant: 0x0a
     Interrupt pin: 0x01 (pin A)
     Interrupt line: 0x03
 
   Capability register at 0x44
     type: 0x01 (Power Management, rev. 1.0)
 
   PCI Power Management Capabilities Register
     Capabilities register: 0x01c2
       Version: 1.1
       PME# clock: off
       Device specific initialization: off
       3.3V auxiliary current: 375 mA
       D1 power management state support: off
       D2 power management state support: off
       PME# support: 0x00
     Control/status register: 0x4000
       Power state: D0
       PCI Express reserved: off
       No soft reset: off
       PME# assertion disabled
       PME# status: off
 
   Device-dependent header:
     0x40: 0x00000000 0x01c20001 0xc6004000 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 Atheros Communications product 0x001a (ethernet network, revision 0x01) at ? 
dev 11 function 0 (tag 0x80005800, intrtag 0x80005800, intrswiz 0, intrpin 0x1, 
i/o off, mem on, no quirks)
 ath0: interrupting at ioapic0 pin 17
 ath0: unable to attach hardware; HAL status 13
 isa0 at pcib0
 cbb0: cacheline 0x0 lattimer 0x40
 cbb0: bhlc 0x24000
 cbb0: interrupting at ioapic0 pin 19
 cardslot0 at cbb0
 cardbus0 at cardslot0: bus 2
 pcmcia0 at cardslot0
 timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
 auich0: measured ac97 link rate at 48003 Hz, will use 48000 Hz
 audio0 at auich0: full duplex, mmap, independent
 acpiacad0: AC adapter online.
 uhub0 at usb0: Silicon Integra OHCI root hub, class 9/0, rev 1.00/1.00, addr 1
 uhub0: 3 ports with 3 removable, self powered
 uhub1 at usb1: Silicon Integra OHCI root hub, class 9/0, rev 1.00/1.00, addr 1
 uhub1: 3 ports with 3 removable, self powered
 uhub2 at usb2: Silicon Integrated System EHCI root hub, class 9/0, rev 
2.00/1.00, addr 1
 uhub2: 6 ports with 6 removable, self powered
 acpibat0: battery info: SANYO, LION, 01ZL 244
 acpibat0: battery info: SANYO, LION, 01ZL 244
 wd0 at atabus0 drive 0: <WDC WD1200BEVE-00UYT0>
 wd0: drive supports 16-sector PIO transfers, LBA48 addressing
 wd0: 111 GB, 232581 cyl, 16 head, 63 sec, 512 bytes/sect x 234441648 sectors
 wd0: 32-bit data port
 wd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 5 (Ultra/100)
 wd0(siside0:0:0): using PIO mode 4, Ultra-DMA mode 5 (Ultra/100) (using DMA)
 atapibus0 at atabus1: 2 targets
 cd0 at atapibus0 drive 0: <Slimtype DVDRW SSW-8015S, , HRS2> cdrom removable
 cd0: 32-bit data port
 cd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 4 (Ultra/66)
 cd0(siside0:1:0): using PIO mode 4, Ultra-DMA mode 4 (Ultra/66) (using DMA)
 Kernelized RAIDframe activated
 pad0: outputs: 44100Hz, 16-bit, stereo
 audio1 at pad0: half duplex
 boot device: wd0
 root on wd0a dumps on wd0b
 root file system type: ffs
 wsdisplay0: screen 1 added (80x25, vt100 emulation)
 wsdisplay0: screen 2 added (80x25, vt100 emulation)
 wsdisplay0: screen 3 added (80x25, vt100 emulation)
 wsdisplay0: screen 4 added (80x25, vt100 emulation)
 
 B) WORKING
 
 
 0)
 siside0: bus-master DMA support present
 siside0: primary channel configured to compatibility mode
 siside0: primary channel interrupting at ioapic0 pin 14
 atabus0 at siside0 channel 0
 siside0: secondary channel configured to compatibility mode
 siside0: secondary channel interrupting at ioapic0 pin 15
 atabus1 at siside0 channel 1
 Silicon Integrated System product 0x7013 (modem communications, revision 0xa0) 
at pci0 dev 2 function 6: PCI configuration registers:
   Common header:
     0x00: 0x70131039 0x02900005 0x070300a0 0x0000ad00
 
     Vendor Name: Silicon Integrated System (0x1039)
     Device ID: 0x7013
     Command register: 0x0005
       I/O space accesses: on
       Memory space accesses: off
       Bus mastering: on
       Special cycles: off
       MWI transactions: off
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x0290
       Capability List support: on
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: communications (0x07)
     Subclass Name: modem (0x03)
     Interface: 0x00
     Revision ID: 0xa0
     BIST: 0x00
     Header Type: 0x00 (0x00)
     Latency Timer: 0xad
     Cache Line Size: 0x00
 
   Type 0 ("normal" device) header:
     0x10: 0x00001401 0x00001081 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00821025
     0x30: 0x00000000 0x00000048 0x00000000 0x0b340303
 
     Base address register at 0x10
       type: 32-bit i/o
       base: 0x00001400, size: 0x00000100
     Base address register at 0x14
       type: 32-bit i/o
       base: 0x00001080, size: 0x00000080
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x1025
     Subsystem ID: 0x0082
     Expansion ROM Base Address: 0x00000000
     Capability list pointer: 0x48
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x0b
     Minimum Grant: 0x34
     Interrupt pin: 0x03 (pin C)
     Interrupt line: 0x03
 
   Capability register at 0x48
     type: 0x01 (Power Management, rev. 1.0)
 
   PCI Power Management Capabilities Register
     Capabilities register: 0xc642
       Version: 1.1
       PME# clock: off
       Device specific initialization: off
       3.3V auxiliary current: 55 mA
       D1 power management state support: on
       D2 power management state support: on
       PME# support: 0x18
     Control/status register: 0x0000
       Power state: D0
       PCI Express reserved: off
       No soft reset: off
       PME# assertion disabled
       PME# status: off
 
   Device-dependent header:
     0x40: 0x00000002 0x00000000 0xc6420001 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000002 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 Silicon Integrated System product 0x7013 (modem communications, revision 0xa0) 
at pci0 dev 2 function 6 (tag 0x80001600, intrtag 0x80001600, intrswiz 0, 
intrpin 0x3, i/o on, mem off, no quirks) not configured
 auich0 at pci0 dev 2 function 7: PCI configuration registers:
   Common header:
     0x00: 0x70121039 0x02900005 0x040100a0 0x0000ad00
 
     Vendor Name: Silicon Integrated System (0x1039)
     Device Name: 7012 AC-97 Sound (0x7012)
     Command register: 0x0005
       I/O space accesses: on
       Memory space accesses: off
       Bus mastering: on
       Special cycles: off
       MWI transactions: off
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x0290
       Capability List support: on
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: multimedia (0x04)
     Subclass Name: audio (0x01)
     Interface: 0x00
     Revision ID: 0xa0
     BIST: 0x00
     Header Type: 0x00 (0x00)
     Latency Timer: 0xad
     Cache Line Size: 0x00
 
   Type 0 ("normal" device) header:
     0x10: 0x00001c01 0x00001801 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00821025
     0x30: 0x00000000 0x00000048 0x00000000 0x0b340303
 
     Base address register at 0x10
       type: 32-bit i/o
       base: 0x00001c00, size: 0x00000100
     Base address register at 0x14
       type: 32-bit i/o
       base: 0x00001800, size: 0x00000080
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x1025
     Subsystem ID: 0x0082
     Expansion ROM Base Address: 0x00000000
     Capability list pointer: 0x48
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x0b
     Minimum Grant: 0x34
     Interrupt pin: 0x03 (pin C)
     Interrupt line: 0x03
 
   Capability register at 0x48
     type: 0x01 (Power Management, rev. 1.0)
 
   PCI Power Management Capabilities Register
     Capabilities register: 0xc642
       Version: 1.1
       PME# clock: off
       Device specific initialization: off
       3.3V auxiliary current: 55 mA
       D1 power management state support: on
       D2 power management state support: on
       PME# support: 0x18
     Control/status register: 0x0000
       Power state: D0
       PCI Express reserved: off
       No soft reset: off
       PME# assertion disabled
       PME# status: off
 
   Device-dependent header:
     0x40: 0x00000004 0x00000000 0xc6420001 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000002 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 Silicon Integrated System 7012 AC-97 Sound (audio multimedia, revision 0xa0) 
at ? dev 2 function 7 (tag 0x80001700, intrtag 0x80001700, intrswiz 0, intrpin 
0x3, i/o on, mem off, no quirks): SiS 7012 AC-97 Audio
 auich0: interrupting at ioapic0 pin 18
 auich0: ac97: Avance Logic unknown (0x414c4770) codec; headphone, 20 bit DAC, 
18 bit ADC, no 3D stereo
 auich0: ac97: ext id a07<AC97_23,AMAP,SPDIF,DRA,VRA>
 ohci0 at pci0 dev 3 function 0: PCI configuration registers:
   Common header:
     0x00: 0x70011039 0x02800017 0x0c03100f 0x00804000
 
     Vendor Name: Silicon Integrated System (0x1039)
     Device Name: 5597/5598 USB host controller (0x7001)
     Command register: 0x0017
       I/O space accesses: on
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: on
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x0280
       Capability List support: off
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: serial bus (0x0c)
     Subclass Name: USB (0x03)
     Interface: 0x10
     Revision ID: 0x0f
     BIST: 0x00
     Header Type: 0x00+multifunction (0x80)
     Latency Timer: 0x40
     Cache Line Size: 0x00
 
   Type 0 ("normal" device) header:
     0x10: 0xe2000000 0x00000000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00821025
     0x30: 0x00000000 0x00000000 0x00000000 0x50000109
 
     Base address register at 0x10
       type: 32-bit nonprefetchable memory
       base: 0xe2000000, size: 0x00001000
     Base address register at 0x14
       not implemented(?)
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x1025
     Subsystem ID: 0x0082
     Expansion ROM Base Address: 0x00000000
     Reserved @ 0x34: 0x00000000
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x50
     Minimum Grant: 0x00
     Interrupt pin: 0x01 (pin A)
     Interrupt line: 0x09
 
   Device-dependent header:
     0x40: 0x00000000 0x0001ac5c 0x0000023f 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0xc9c20001
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 Silicon Integrated System 5597/5598 USB host controller (USB serial bus, 
interface 0x10, revision 0x0f) at ? dev 3 function 0 (tag 0x80001800, intrtag 
0x80001800, intrswiz 0, intrpin 0x1, i/o on, mem on, no quirks): Silicon 
Integrated System 5597/5598 USB host controller (rev. 0x0f)
 ohci0: interrupting at ioapic0 pin 20
 ohci0: OHCI version 1.0, legacy support
 usb0 at ohci0: USB revision 1.0
 ohci1 at pci0 dev 3 function 1: PCI configuration registers:
   Common header:
     0x00: 0x70011039 0x02800017 0x0c03100f 0x00004000
 
     Vendor Name: Silicon Integrated System (0x1039)
     Device Name: 5597/5598 USB host controller (0x7001)
     Command register: 0x0017
       I/O space accesses: on
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: on
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x0280
       Capability List support: off
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: serial bus (0x0c)
     Subclass Name: USB (0x03)
     Interface: 0x10
     Revision ID: 0x0f
     BIST: 0x00
     Header Type: 0x00 (0x00)
     Latency Timer: 0x40
     Cache Line Size: 0x00
 
   Type 0 ("normal" device) header:
     0x10: 0xe2001000 0x00000000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00821025
     0x30: 0x00000000 0x00000000 0x00000000 0x5000020b
 
     Base address register at 0x10
       type: 32-bit nonprefetchable memory
       base: 0xe2001000, size: 0x00001000
     Base address register at 0x14
       not implemented(?)
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x1025
     Subsystem ID: 0x0082
     Expansion ROM Base Address: 0x00000000
     Reserved @ 0x34: 0x00000000
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x50
     Minimum Grant: 0x00
     Interrupt pin: 0x02 (pin B)
     Interrupt line: 0x0b
 
   Device-dependent header:
     0x40: 0x00000000 0x0001ac5c 0x0000023f 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0xc9c20001
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 Silicon Integrated System 5597/5598 USB host controller (USB serial bus, 
interface 0x10, revision 0x0f) at ? dev 3 function 1 (tag 0x80001900, intrtag 
0x80001900, intrswiz 0, intrpin 0x2, i/o on, mem on, no quirks): Silicon 
Integrated System 5597/5598 USB host controller (rev. 0x0f)
 ohci1: interrupting at ioapic0 pin 21
 ohci1: OHCI version 1.0, legacy support
 usb1 at ohci1: USB revision 1.0
 ehci0 at pci0 dev 3 function 3: PCI configuration registers:
   Common header:
     0x00: 0x70021039 0x02900006 0x0c032000 0x00004000
 
     Vendor Name: Silicon Integrated System (0x1039)
     Device Name: 7002 USB 2.0 host controller (0x7002)
     Command register: 0x0006
       I/O space accesses: off
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: off
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x0290
       Capability List support: on
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: serial bus (0x0c)
     Subclass Name: USB (0x03)
     Interface: 0x20
     Revision ID: 0x00
     BIST: 0x00
     Header Type: 0x00 (0x00)
     Latency Timer: 0x40
     Cache Line Size: 0x00
 
   Type 0 ("normal" device) header:
     0x10: 0xe2002000 0x00000000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00821025
     0x30: 0x00000000 0x00000050 0x00000000 0x5000040a
 
     Base address register at 0x10
       type: 32-bit nonprefetchable memory
       base: 0xe2002000, size: 0x00001000
     Base address register at 0x14
       not implemented(?)
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x1025
     Subsystem ID: 0x0082
     Expansion ROM Base Address: 0x00000000
     Capability list pointer: 0x50
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x50
     Minimum Grant: 0x00
     Interrupt pin: 0x04 (pin D)
     Interrupt line: 0x0a
 
   Capability register at 0x50
     type: 0x01 (Power Management, rev. 1.0)
 
   PCI Power Management Capabilities Register
     Capabilities register: 0xc9c2
       Version: 1.1
       PME# clock: off
       Device specific initialization: off
       3.3V auxiliary current: 375 mA
       D1 power management state support: off
       D2 power management state support: off
       PME# support: 0x19
     Control/status register: 0x0000
       Power state: D0
       PCI Express reserved: off
       No soft reset: off
       PME# assertion disabled
       PME# status: off
 
   Device-dependent header:
     0x40: 0x08000000 0x00000000 0x00000000 0x00000000
     0x50: 0xc9c20001 0x00000000 0x2100000a 0x00000000
     0x60: 0x007f2020 0x00000000 0x00000000 0x00000000
     0x70: 0x00000001 0xc0080000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 Silicon Integrated System 7002 USB 2.0 host controller (USB serial bus, 
interface 0x20) at ? dev 3 function 3 (tag 0x80001b00, intrtag 0x80001b00, 
intrswiz 0, intrpin 0x4, i/o off, mem on, no quirks): Silicon Integrated System 
7002 USB 2.0 host controller (rev. 0x00)
 ehci0: interrupting at ioapic0 pin 23
 ehci0: EHCI version 1.0
 ehci0: companion controllers, 3 ports each: ohci0 ohci1
 usb2 at ehci0: USB revision 2.0
 sip0 at pci0 dev 4 function 0: PCI configuration registers:
   Common header:
     0x00: 0x09001039 0x02900007 0x02000091 0x0000ad00
 
     Vendor Name: Silicon Integrated System (0x1039)
     Device Name: 900 10/100 Ethernet (0x0900)
     Command register: 0x0007
       I/O space accesses: on
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: off
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x0290
       Capability List support: on
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: network (0x02)
     Subclass Name: ethernet (0x00)
     Interface: 0x00
     Revision ID: 0x91
     BIST: 0x00
     Header Type: 0x00 (0x00)
     Latency Timer: 0xad
     Cache Line Size: 0x00
 
   Type 0 ("normal" device) header:
     0x10: 0x00002001 0xe2003000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00821025
     0x30: 0x00000000 0x00000040 0x00000000 0x0b340105
 
     Base address register at 0x10
       type: 32-bit i/o
       base: 0x00002000, size: 0x00000100
     Base address register at 0x14
       type: 32-bit nonprefetchable memory
       base: 0xe2003000, size: 0x00001000
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x1025
     Subsystem ID: 0x0082
     Expansion ROM Base Address: 0x00000000
     Capability list pointer: 0x40
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x0b
     Minimum Grant: 0x34
     Interrupt pin: 0x01 (pin A)
     Interrupt line: 0x05
 
   Capability register at 0x40
     type: 0x01 (Power Management, rev. 1.0)
 
   PCI Power Management Capabilities Register
     Capabilities register: 0xfe02
       Version: 1.1
       PME# clock: off
       Device specific initialization: off
       3.3V auxiliary current: self-powered
       D1 power management state support: on
       D2 power management state support: on
       PME# support: 0x1f
     Control/status register: 0x0000
       Power state: D0
       PCI Express reserved: off
       No soft reset: off
       PME# assertion disabled
       PME# status: off
 
   Device-dependent header:
     0x40: 0xfe020001 0x00000000 0x00000000 0x00000000
     0x50: 0x00000001 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000091 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 Silicon Integrated System 900 10/100 Ethernet (ethernet network, revision 
0x91) at ? dev 4 function 0 (tag 0x80002000, intrtag 0x80002000, intrswiz 0, 
intrpin 0x1, i/o on, mem on, no quirks): SiS 900 10/100 Ethernet, rev 0x91
 sip0: interrupting at ioapic0 pin 19
 sip0: Ethernet address 00:16:36:3c:47:e0
 rlphy0 at sip0 phy 13: RTL8201L 10/100 media interface, rev. 1
 rlphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
 cbb0 at pci0 dev 6 function 0: PCI configuration registers:
   Common header:
     0x00: 0x14101524 0x02100007 0x06070001 0x00024000
 
     Vendor Name: ENE Technology (0x1524)
     Device Name: CB1410 CardBus Controller (0x1410)
     Command register: 0x0007
       I/O space accesses: on
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: off
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x0210
       Capability List support: on
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: off
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: bridge (0x06)
     Subclass Name: CardBus (0x07)
     Interface: 0x00
     Revision ID: 0x01
     BIST: 0x00
     Header Type: 0x02 (0x02)
     Latency Timer: 0x40
     Cache Line Size: 0x00
 
   Type 2 (PCI-CardBus bridge) header:
     0x10: 0x3de00000 0x020000a0 0x20020200 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00000000
     0x30: 0x00000000 0x00000000 0x00000000 0x03400105
     0x40: 0x00821025 0x000003e1
 
     Base address register at 0x10 (CardBus socket/ExCA registers)
       type: 32-bit nonprefetchable memory
       base: 0x3de00000, size: 0x00001000
     Capability list pointer: 0xa0
     Secondary status register: 0x0200
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: off
       Data parity error detection: off
       DEVSEL timing: medium (0x1)
       PCI target aborts terminate CardBus bus master transactions: off
       CardBus target aborts terminate PCI bus master transactions: off
       Bus initiator aborts terminate initiator transactions: off
       System error: off
       Parity error: off
     PCI bus number: 0x00
     CardBus bus number: 0x02
     Subordinate bus number: 0x02
     CardBus latency timer: 0x20
     CardBus memory region 0:
       base register:  0x00000000
       limit register: 0x00000000
     CardBus memory region 1:
       base register:  0x00000000
       limit register: 0x00000000
     CardBus I/O region 0:
       base register:  0x00000000
       limit register: 0x00000000
     CardBus I/O region 1:
       base register:  0x00000000
       limit register: 0x00000000
     Interrupt line: 0x05
     Interrupt pin: 0x01 (pin A)
     Bridge control register: 0x0340
       Parity error response: off
       CardBus SERR forwarding: off
       ISA enable: off
       VGA enable: off
       CardBus master abort reporting: off
       CardBus reset: on
       Functional interrupts routed by ExCA registers: off
       Memory window 0 prefetchable: on
       Memory window 1 prefetchable: on
       Write posting enable: off
     Subsystem vendor ID: 0x1025
     Subsystem ID: 0x0082
     Base address register at 0x44 (legacy-mode registers)
       type: 32-bit i/o
       base: 0x000003e0, size: 0x00000004
 
   Capability register at 0xa0
     type: 0x01 (Power Management, rev. 1.0)
 
   PCI Power Management Capabilities Register
     Capabilities register: 0xfe01
       Version: 1.0
       PME# clock: off
       Device specific initialization: off
       3.3V auxiliary current: self-powered
       D1 power management state support: on
       D2 power management state support: on
       PME# support: 0x1f
     Control/status register: 0x0100
       Power state: D0
       PCI Express reserved: off
       No soft reset: off
       PME# assertion enabled
       PME# status: off
 
   Device-dependent header:
     0x48: 0x00000000 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x0040d020 0x00000000 0x00000000 0x00001002
     0x90: 0x604402c0 0x00000000 0x00000000 0x00000000
     0xa0: 0xfe010001 0x00c00100 0x00000016 0x00000001
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00001000 0x00800080 0x10080600 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 ENE Technology CB1410 CardBus Controller (CardBus bridge, revision 0x01) at ? 
dev 6 function 0 (tag 0x80003000, intrtag 0x80003000, intrswiz 0, intrpin 0x1, 
i/o on, mem on, no quirks): ENE Technology CB1410 CardBus Controller (rev. 0x01)
 ath0 at pci0 dev 11 function 0: PCI configuration registers:
   Common header:
     0x00: 0x001a168c 0x02900016 0x02000001 0x00005004
 
     Vendor Name: Atheros Communications (0x168c)
     Device ID: 0x001a
     Command register: 0x0016
       I/O space accesses: off
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: on
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x0290
       Capability List support: on
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: network (0x02)
     Subclass Name: ethernet (0x00)
     Interface: 0x00
     Revision ID: 0x01
     BIST: 0x00
     Header Type: 0x00 (0x00)
     Latency Timer: 0x50
     Cache Line Size: 0x04
 
   Type 0 ("normal" device) header:
     0x10: 0xe2010000 0x00000000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00005001 0x04181468
     0x30: 0x00000000 0x00000044 0x00000000 0x1c0a0103
 
     Base address register at 0x10
       type: 32-bit nonprefetchable memory
       base: 0xe2010000, size: 0x00010000
     Base address register at 0x14
       not implemented(?)
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00005001
     Subsystem vendor ID: 0x1468
     Subsystem ID: 0x0418
     Expansion ROM Base Address: 0x00000000
     Capability list pointer: 0x44
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x1c
     Minimum Grant: 0x0a
     Interrupt pin: 0x01 (pin A)
     Interrupt line: 0x03
 
   Capability register at 0x44
     type: 0x01 (Power Management, rev. 1.0)
 
   PCI Power Management Capabilities Register
     Capabilities register: 0x01c2
       Version: 1.1
       PME# clock: off
       Device specific initialization: off
       3.3V auxiliary current: 375 mA
       D1 power management state support: off
       D2 power management state support: off
       PME# support: 0x00
     Control/status register: 0x4000
       Power state: D0
       PCI Express reserved: off
       No soft reset: off
       PME# assertion disabled
       PME# status: off
 
   Device-dependent header:
     0x40: 0x00000000 0x01c20001 0xc6004000 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
 
     Don't know how to pretty-print device-dependent header.
 
 Atheros Communications product 0x001a (ethernet network, revision 0x01) at ? 
dev 11 function 0 (tag 0x80005800, intrtag 0x80005800, intrswiz 0, intrpin 0x1, 
i/o off, mem on, no quirks)
 ath0: interrupting at ioapic0 pin 17
 ath0: 11b rates: 1Mbps 2Mbps 5.5Mbps 11Mbps
 ath0: 11g rates: 1Mbps 2Mbps 5.5Mbps 11Mbps 6Mbps 9Mbps 12Mbps 18Mbps 24Mbps 
36Mbps 48Mbps 54Mbps
 ath0: mac 7.8 phy 4.5 radio 5.6
 isa0 at pcib0
 cbb0: cacheline 0x0 lattimer 0x40
 cbb0: bhlc 0x24000
 cbb0: interrupting at ioapic0 pin 19
 cardslot0 at cbb0
 cardbus0 at cardslot0: bus 2
 pcmcia0 at cardslot0
 timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
 auich0: measured ac97 link rate at 48000 Hz
 audio0 at auich0: full duplex, mmap, independent
 acpiacad0: AC adapter online.
 uhub0 at usb0: Silicon Integra OHCI root hub, class 9/0, rev 1.00/1.00, addr 1
 uhub0: 3 ports with 3 removable, self powered
 uhub1 at usb1: Silicon Integra OHCI root hub, class 9/0, rev 1.00/1.00, addr 1
 uhub1: 3 ports with 3 removable, self powered
 uhub2 at usb2: Silicon Integrated System EHCI root hub, class 9/0, rev 
2.00/1.00, addr 1
 uhub2: 6 ports with 6 removable, self powered
 acpibat0: battery info: SANYO, LION, 01ZL 244
 acpibat0: battery info: SANYO, LION, 01ZL 244
 wd0 at atabus0 drive 0: <WDC WD1200BEVE-00UYT0>
 wd0: drive supports 16-sector PIO transfers, LBA48 addressing
 wd0: 111 GB, 232581 cyl, 16 head, 63 sec, 512 bytes/sect x 234441648 sectors
 wd0: 32-bit data port
 wd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 5 (Ultra/100)
 wd0(siside0:0:0): using PIO mode 4, Ultra-DMA mode 5 (Ultra/100) (using DMA)
 atapibus0 at atabus1: 2 targets
 cd0 at atapibus0 drive 0: <Slimtype DVDRW SSW-8015S, , HRS2> cdrom removable
 cd0: 32-bit data port
 cd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 4 (Ultra/66)
 cd0(siside0:1:0): using PIO mode 4, Ultra-DMA mode 4 (Ultra/66) (using DMA)
 Kernelized RAIDframe activated
 pad0: outputs: 44100Hz, 16-bit, stereo
 audio1 at pad0: half duplex
 boot device: wd0
 root on wd0a dumps on wd0b
 root file system type: ffs
 wsdisplay0: screen 1 added (80x25, vt100 emulation)
 wsdisplay0: screen 2 added (80x25, vt100 emulation)
 wsdisplay0: screen 3 added (80x25, vt100 emulation)
 wsdisplay0: screen 4 added (80x25, vt100 emulation)
 
 Thank you very much for your help in resolving this issue.
 
 Kind regards,
 
 Nino
 
 
 -------- Original-Nachricht --------
 > Datum: Sat, 27 Jun 2009 17:15:05 +0000 (UTC)
 > Von: David Holland <dholland-bugs%netbsd.org@localhost>
 > An: port-i386-maintainer%netbsd.org@localhost, 
 > gnats-admin%netbsd.org@localhost, netbsd-bugs%netbsd.org@localhost, 
 > nbsdold%gmx.net@localhost
 > Betreff: Re: port-i386/41624: atheros-card works in 4.0 but not in 5.0
 
 > The following reply was made to PR port-i386/41624; it has been noted by
 > GNATS.
 > 
 > From: David Holland <dholland-bugs%netbsd.org@localhost>
 > To: gnats-bugs%NetBSD.org@localhost
 > Cc: 
 > Subject: Re: port-i386/41624: atheros-card works in 4.0 but not in 5.0
 > Date: Sat, 27 Jun 2009 17:14:54 +0000
 > 
 >  On Mon, Jun 22, 2009 at 09:15:00AM +0000, nbsdold%gmx.net@localhost wrote:
 >   > I am using a laptop (Acer Aspire 3634) with a wireless-card of
 >   > Atheros type, I guess made by Amtel. On NetBSD 5.0 this card does
 >   > not work. On NetBSD 4.0 this card DOES work, and produces the
 >   > device ath0.
 >   > 
 >   > Below is the dmesg 1. from NetBSD 4.0, where it works, and 2. of
 >   > NetBSD 5.0, where it only reads "cannot map register space". I
 >   > would be very grateful for any help.
 >  
 >  Does adding 'options PCI_ADDR_FIXUP' to the kernel config help?
 >  
 >  -- 
 >  David A. Holland
 >  dholland%netbsd.org@localhost
 >  
 
 -- 
 Neu: GMX Doppel-FLAT mit Internet-Flatrate + Telefon-Flatrate
 für nur 19,99 Euro/mtl.!* http://portal.gmx.net/de/go/dsl02
 


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