Re: kern/38857

To: kern-bug-people%netbsd.org@localhost,gnats-admin%netbsd.org@localhost,netbsd-bugs%netbsd.org@localhost,gson%gson.org@localhost (Andreas Gustafsson)
Subject: Re: kern/38857
From: gson%gson.org@localhost (Andreas Gustafsson)
Date: Thu, 3 Jul 2008 10:00:18 +0000 (UTC)
The following reply was made to PR kern/38857; it has been noted by GNATS.

From: gson%gson.org@localhost (Andreas Gustafsson)
To: gnats-bugs%NetBSD.org@localhost
Cc: fun%naobsd.org@localhost
Subject: Re: kern/38857
Date: Thu, 3 Jul 2008 12:56:41 +0300

 fun%naobsd.org@localhost wrote:
 >  sys/dev/pci/autri.c rev. 1.37 seems to be wrong. please back out 1.37
 >  and apply this patch.
 >  
 >  my friend said autri(4) on Libretto L2 works fine with this patch on NetBSD
 >  4.0.
 >  
 >  --- sys/dev/pci/autri.c.orig        2006-11-16 10:33:08.000000000 +0900
 >  +++ sys/dev/pci/autri.c     2008-06-20 18:12:15.000000000 +0900
 >  @@ -536,6 +536,12 @@
 >      sc->sc_revision = PCI_REVISION(pa->pa_class);
 >      aprint_normal(": %s (rev. 0x%02x)\n", devinfo, sc->sc_revision);
 >   
 >  +   /* enable memory space access */
 >  +   reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
 >  +   reg |= PCI_COMMAND_MEM_ENABLE;
 >  +   pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
 >  +   pa->pa_flags |= PCI_FLAGS_MEM_ENABLED;
 >  +
 >      /* map register to memory */
 >      if (pci_mapreg_map(pa, AUTRI_PCI_MEMORY_BASE,
 >          PCI_MAPREG_TYPE_MEM, 0, &sc->memt, &sc->memh, NULL, NULL)) {
 
 When I revert the change of autri.c 1.37 and apply the above patch
 to -current, the autri in my Libretto L2 still fails to attach with
 the message
 
   autri0: can't map memory space
 
 though the mechanics of the failure are different than without the
 patch.  With the patch, the chain of events is that pci_mapreg_map()
 calls bus_space_map(), which calls extent_alloc_region(), which
 returns EAGAIN.
 
 After examining the output of "pcictl /dev/pci0 dump -b 0 -d 6 -f 0"
 more closely, I think enabling memory accesses from within the autri
 driver is an incorrect fix, because the PCI base address registers of
 the autri device are not set up correctly by the BIOS.  I guess this
 also explains why the change in autri.c 1.37 causes a lockup during
 the attack of an unrelated device; enabling a device whose BARs are
 not set up surely will wreak havoc on the PCI bus.
 
 I think the correct fix for the autri attach failure is to simply use
 "options PCI_ADDR_FIXUP", which will not only enable memory space
 accesses, but also set up the BARs.  Note that you also need "options
 PCI_BUS_FIXUP", not because any buses actually need fixing up, but
 because PCI_ADDR_FIXUP depends on it and will have no effect without
 it.
 
 Here is the output from "pcictl /dev/pci0 dump -b 0 -d 6 -f 0"
 using a -current kernel minus the change of autri.c 1.37:
 
 PCI configuration registers:
   Common header:
     0x00: 0x545110b9 0xc2900000 0x04010001 0x00004000
 
     Vendor Name: Acer Labs (0x10b9)
     Device Name: M5451 AC-Link Controller Audio Device (0x5451)
     Command register: 0x0000
       I/O space accesses: off
       Memory space accesses: off
       Bus mastering: off
       Special cycles: off
       MWI transactions: off
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0xc290
       Capability List support: on
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): on
       Parity error detected: on
     Class Name: multimedia (0x04)
     Subclass Name: audio (0x01)
     Interface: 0x00
     Revision ID: 0x01
     BIST: 0x00
     Header Type: 0x00 (0x00)
     Latency Timer: 0x40
     Cache Line Size: 0x00
 
   Type 0 ("normal" device) header:
     0x10: 0x00000001 0x00000000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00011179
     0x30: 0x00000000 0x000000dc 0x00000000 0x180201ff
 
     Base address register at 0x10
       type: i/o
       base: 0x00000000, not sized
     Base address register at 0x14
       not implemented(?)
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x1179
     Subsystem ID: 0x0001
     Expansion ROM Base Address: 0x00000000
     Capability list pointer: 0xdc
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x18
     Minimum Grant: 0x02
     Interrupt pin: 0x01 (pin A)
     Interrupt line: 0xff
 
   Capability register at 0xdc
     type: 0x01 (Power Management, rev. 1.0)
 
   Device-dependent header:
     0x40: 0x00000000 0xe2080000 0x00000000 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0xe6220001
     0xe0: 0x00000003 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
 
 And here is the corresponding output after enabling PCI_ADDR_FIXUP
 (and PCI_BUS_FIXUP):
 
 PCI configuration registers:
   Common header:
     0x00: 0x545110b9 0xc2900007 0x04010001 0x00004000
 
     Vendor Name: Acer Labs (0x10b9)
     Device Name: M5451 AC-Link Controller Audio Device (0x5451)
     Command register: 0x0007
       I/O space accesses: on
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: off
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0xc290
       Capability List support: on
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: on
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): on
       Parity error detected: on
     Class Name: multimedia (0x04)
     Subclass Name: audio (0x01)
     Interface: 0x00
     Revision ID: 0x01
     BIST: 0x00
     Header Type: 0x00 (0x00)
     Latency Timer: 0x40
     Cache Line Size: 0x00
 
   Type 0 ("normal" device) header:
     0x10: 0x00005801 0x17000000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00011179
     0x30: 0x00000000 0x000000dc 0x00000000 0x18020107
 
     Base address register at 0x10
       type: i/o
       base: 0x00005800, not sized
     Base address register at 0x14
       type: 32-bit nonprefetchable memory
       base: 0x17000000, not sized
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x1179
     Subsystem ID: 0x0001
     Expansion ROM Base Address: 0x00000000
     Capability list pointer: 0xdc
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x18
     Minimum Grant: 0x02
     Interrupt pin: 0x01 (pin A)
     Interrupt line: 0x07
 
   Capability register at 0xdc
     type: 0x01 (Power Management, rev. 1.0)
 
   Device-dependent header:
     0x40: 0x00000000 0xe2080000 0x00000000 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0xe6220001
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
 
 Note that "Base address register at 0x14" is set up in the latter
 output, but not in the former.
 
 I intend to revert the change of autri.c 1.37, but not apply the other
 patch since it makes no difference on my system.
 
 Is autri actually broken on the Libretto L2 in 4.0?  Since 4.0 still
 shipped with a GENERIC_LAPTOP kernel which enabled PCI_ADDR_FIXUP, I
 would expect it to just work.  If it doesn't, please file a separate
 PR.
 -- 
 Andreas Gustafsson, gson%gson.org@localhost
Follow-Ups:
- Re: kern/38857
  - From: Matthias Drochner
Prev by Date: Re: port-i386/39086: dmesg doesn't really identifies CPU any more
Next by Date: Re: kern/38956 (rb tree corruption?)
Previous by Thread: Re: kern/38857
Next by Thread: Re: kern/38857
Indexes:
Home | Main Index | Thread Index | Old Index