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Re: kern/38698: NMI during boot on Fujitsu-Siemens Lifebook S-4546

The following reply was made to PR kern/38698; it has been noted by GNATS.

From: (Andreas Gustafsson)
To: David Young <>
Subject: Re: kern/38698: NMI during boot on Fujitsu-Siemens Lifebook S-4546
Date: Wed, 21 May 2008 18:10:07 +0300

 David Young wrote:
 > Try commenting out line 759.  Is there an NMI somewhere else, or does
 > it work ok?
 When I do that, I still get an NMI.  The backtrace contains
 pccbb_chipinit+0x118, which corresponds to line 778:
 777             /* Route functional interrupts to PCI. */
 778             bcr = pci_conf_read(pc, tag, PCI_BRIDGE_CONTROL_REG);
 > Do your CardBus slots work?
 the CardBus slot works (there's only one of them).
 > I'm curious what 'pcictl pci0 dump -d 0' says about the PCI host
 > bridge configuration.
 PCI configuration registers:
   Common header:
     0x00: 0x71948086 0x32000006 0x06000001 0x00804000
     Vendor Name: Intel (0x8086)
     Device Name: 82443MX Host Bridge/Controller (0x7194)
     Command register: 0x0006
       I/O space accesses: off
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: off
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
       Interrupt disable: off
     Status register: 0x3200
       Capability List support: off
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: off
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: on
       Master received Master Abort: on
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: bridge (0x06)
     Subclass Name: host (0x00)
     Interface: 0x00
     Revision ID: 0x01
     BIST: 0x00
     Header Type: 0x00+multifunction (0x80)
     Latency Timer: 0x40
     Cache Line Size: 0x00
   Type 0 ("normal" device) header:
     0x10: 0x00000000 0x00000000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x107f10cf
     0x30: 0x00000000 0x00000000 0x00000000 0x00000000
     Base address register at 0x10
       not implemented(?)
     Base address register at 0x14
       not implemented(?)
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x10cf
     Subsystem ID: 0x107f
     Expansion ROM Base Address: 0x00000000
     Reserved @ 0x34: 0x00000000
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x00
     Minimum Grant: 0x00
     Interrupt pin: 0x00 (none)
     Interrupt line: 0x00
   Device-dependent header:
     0x40: 0x00000000 0x00000000 0x00000000 0x00000000
     0x50: 0x0000800c 0x09000000 0x11111000 0x11100000
     0x60: 0x20202010 0x00000000 0x00c00a00 0x00002000
     0x70: 0x380a1f20 0x0107000a 0x00da0326 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00080000 0x00000104 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0xa7e70018 0x00000028
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x74afafac 0x80003e87 0x74afaeac 0x00003e87
     0xf0: 0x00000000 0x2028fa00 0x00000f3a 0x00000000
 Andreas Gustafsson,

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