NetBSD-Bugs archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
kern/38698: NMI during boot on Fujitsu-Siemens Lifebook S-4546
>Number: 38698
>Category: kern
>Synopsis: NMI during boot on Fujitsu-Siemens Lifebook S-4546
>Confidential: no
>Severity: serious
>Priority: medium
>Responsible: kern-bug-people
>State: open
>Class: sw-bug
>Submitter-Id: net
>Arrival-Date: Mon May 19 12:15:00 +0000 2008
>Originator: Andreas Gustafsson
>Release: NetBSD 4.99.62 as of 20080513-1503 EET
>Organization:
>Environment:
System: NetBSD 4.99.62
Architecture: i386
Machine: i386
>Description:
When I boot a NetBSD-current installation CD on a Fujitsu-Siemens Lifebook
S-4546 laptop, it drops into DDB with an NMI during autoconfiguration.
The final messages (transcribed by hand) are:
cbb0 at pci0 dev 19 function 0: vendor 0x1217 product 0x6933 (rev. 0x02)
cbb1 at pci0 dev 19 function 1: vendor 0x1217 product 0x6933 (rev. 0x02)
vga1 at pci0 dev 20 function 0: vendor 0x1002 product 0x4c52 (rev. 0x64)
wsdisplay0 at vga1 kbdmux 1: console (80x25, vt100 emulation)
drm at vga1 not configured
NMI ... going to debugger
Stopped in pid 0.1 (system) at netbsd:outl+0x9: ret
db{0}>
The first few locations shown in the stack trace are
outl+0x9
pccbb_chipinint+0x3b5
pccbb_pci_callback+0xde
config_process_deferred+0x44
The instruction at outl+0x8 is "outl %eax,%dx". According to "show
registers", eax is 0x0, and edx is 0xcf8. I believe this outl() is
part of the pci_conf_write() to set the CardBus latency timer at line
759 of pccbb.c.
Booting a 4.0 release CD works.
>How-To-Repeat:
>Fix:
The following change may be more of a workaround than a fix, but
it make the machine boot successfully.
Index: pccbb.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/pccbb.c,v
retrieving revision 1.167
diff -u -r1.167 pccbb.c
--- pccbb.c 4 Mar 2008 22:15:16 -0000 1.167
+++ pccbb.c 19 May 2008 12:04:56 -0000
@@ -746,7 +746,9 @@
/* I believe it is harmless. */
csr |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
PCI_COMMAND_MASTER_ENABLE);
+#if 0
csr |= (PCI_COMMAND_PARITY_ENABLE|PCI_COMMAND_SERR_ENABLE);
+#endif
pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
/*
Home |
Main Index |
Thread Index |
Old Index