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Re: bin/38667: cpuctl does not properly deal with AMD Phenom
The following reply was made to PR bin/38667; it has been noted by GNATS.
From: Paul Goyette <paul%whooppee.com@localhost>
To: gnats-bugs%NetBSD.org@localhost
Cc: chris%netbsd.org@localhost
Subject: Re: bin/38667: cpuctl does not properly deal with AMD Phenom
Date: Fri, 16 May 2008 04:43:37 -0700 (PDT)
OK, it ssems that cpuctl is reporting the same cache values as used to
be reported by boot-time messages, so that's not really an issue. But
it still doesn't describe the processor correctly.
Here's the dmesg output from previous 4.99.60 kernel:
cpu0 at mainbus0 apid 0: (boot processor)
cpu0: AMD Phenom(tm) 9600 Quad-Core Processor, 2310.80 MHz
cpu0: features: ffdbfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu0: features: ffdbfbff<PGE,MCA,CMOV,PAT,PSE36,MPC,NOX,MMXX,MMX>
cpu0: features: ffdbfbff<FXSR,SSE,SSE2,RDTSCP,HTT,LONG,3DNOW2,3DNOW>
cpu0: features2: 802009<SSE3,MONITOR,CX16,POPCNT>
cpu0: I-cache 64 KB 64B/line 2-way, D-cache 64 KB 64B/line 2-way
cpu0: L2 cache 512 KB 64B/line 16-way
cpu0: ITLB 32 4 KB entries fully associative, 16 4 MB entries fully associative
cpu0: DTLB 48 4 KB entries fully associative, 48 4 MB entries fully associative
cpu0: Initial APIC ID 0
cpu0: AMD Power Management features: 1f9<STC,TM,TTP,TS>
cpu0: calibrating local timer
cpu0: apic clock running at 201 MHz
cpu0: 8 page colors
And here's what cpuctl shows on 4.99.62:
cpu0: AMD Unknown K8 (Athlon) (686-class), 2310.81 MHz, id 0x100f22
cpu0: features ffdbfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu0: features ffdbfbff<PGE,MCA,CMOV,PAT,PSE36,MPC,NOX,MMXX,MMX>
cpu0: features ffdbfbff<FXSR,SSE,SSE2,RDTSCP,HTT,LONG,3DNOW2,3DNOW>
cpu0: features2 802009<SSE3,MONITOR,CX16,POPCNT>
cpu0: "AMD Phenom(tm) 9600 Quad-Core Processor"
cpu0: I-cache 64kB 64B/line 2-way, D-cache 64kB 64B/line 2-way
cpu0: L2 cache 512kB 64B/line 16-way
cpu0: ITLB 32 4096B entries fully associative, 16 4194304B entries fully
associative
cpu0: DTLB 48 4096B entries fully associative, 48 4194304B entries fully
associative
cpu0: Initial APIC ID 1
cpu0: family 0f model 02 extfamily 01 extmodel 00
Finally, looking closer at the output from cpuctl, it appears that we
should be using humanize_number(1) for the output of the number of cache
entries! The following patch should take care of it:
Index: i386.c
===================================================================
RCS file: /cvsroot/src/usr.sbin/cpuctl/arch/i386.c,v
retrieving revision 1.3
diff -u -p -r1.3 i386.c
--- i386.c 15 May 2008 23:31:56 -0000 1.3
+++ i386.c 16 May 2008 11:34:37 -0000
@@ -1656,6 +1656,8 @@ print_tlb_config(struct cpu_info *ci, in
const char *sep)
{
struct x86_cache_info *cai = &ci->ci_cinfo[cache_tag];
+#define _TLB_BUFSIZE 5
+ char human_num[_TLB_BUFSIZE];
if (cai->cai_totalsize == 0)
return sep;
@@ -1670,8 +1672,10 @@ print_tlb_config(struct cpu_info *ci, in
if (cai->cai_string != NULL) {
aprint_verbose("%s", cai->cai_string);
} else {
- aprint_verbose("%d %dB entries ", cai->cai_totalsize,
- cai->cai_linesize);
+ (void)humanize_number(human_num, _TLB_BUFSIZE,
+ cai->cai_linesize, "B", HN_AUTOSCALE, HN_NOSPACE);
+ aprint_verbose("%d %s entries ", cai->cai_totalsize,
+ human_num);
switch (cai->cai_associativity) {
case 0:
aprint_verbose("disabled");
With this patch, the TLB data is now printed as
cpu0: ITLB 32 4KB entries fully associative, 16 4MB entries fully associative
cpu0: DTLB 48 4KB entries fully associative, 48 4MB entries fully associative
On Thu, 15 May 2008, gnats-admin%netbsd.org@localhost wrote:
> Thank you very much for your problem report.
> It has the internal identification `bin/38667'.
> The individual assigned to look at your
> report is: bin-bug-people.
>
>> Category: bin
>> Responsible: bin-bug-people
>> Synopsis: cpuctl does not properly deal with AMD Phenom
>> Arrival-Date: Thu May 15 14:10:00 +0000 2008
>
>
> !DSPAM:482c44501761685519919!
>
>
>
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