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Re: kern/37868: nfe0 doesn't wake up completely after booting Windows
wiz%NetBSD.org@localhost wrote:
> When I boot XP SP2 and then boot to NetBSD (doesn't matter if warm
> or cold boot), I get many messages:
> nfe0: watchdog timeout
> and nfe0 is unusable.
How about this patch? (from FreeBSD/Linux driver via OpenBSD)
---
Index: dev/pci/if_nfe.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/if_nfe.c,v
retrieving revision 1.25
diff -u -r1.25 if_nfe.c
--- dev/pci/if_nfe.c 17 Dec 2007 12:41:06 -0000 1.25
+++ dev/pci/if_nfe.c 25 Jan 2008 12:24:42 -0000
@@ -280,7 +280,7 @@
case PCI_PRODUCT_NVIDIA_MCP73_LAN2:
case PCI_PRODUCT_NVIDIA_MCP73_LAN3:
case PCI_PRODUCT_NVIDIA_MCP73_LAN4:
- sc->sc_flags |= NFE_40BIT_ADDR;
+ sc->sc_flags |= NFE_40BIT_ADDR | NFE_PWR_MGMT;
break;
case PCI_PRODUCT_NVIDIA_CK804_LAN1:
case PCI_PRODUCT_NVIDIA_CK804_LAN2:
@@ -295,10 +295,21 @@
case PCI_PRODUCT_NVIDIA_MCP65_LAN3:
case PCI_PRODUCT_NVIDIA_MCP65_LAN4:
sc->sc_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR | NFE_HW_CSUM |
- NFE_HW_VLAN;
+ NFE_HW_VLAN | NFE_PWR_MGMT;
break;
}
+ if ((sc->sc_flags & NFE_PWR_MGMT) != 0) {
+ NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_RESET | NFE_RXTX_BIT2);
+ NFE_WRITE(sc, NFE_MAC_RESET, NFE_MAC_RESET_MAGIC);
+ DELAY(100);
+ NFE_WRITE(sc, NFE_MAC_RESET, 0);
+ DELAY(100);
+ NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_BIT2);
+ NFE_WRITE(sc, NFE_PWR2_CTL,
+ NFE_READ(sc, NFE_PWR2_CTL) & ~NFE_PWR2_WAKEUP_MASK);
+ }
+
#ifndef NFE_NO_JUMBO
/* enable jumbo frames for adapters that support it */
if (sc->sc_flags & NFE_JUMBO_SUP)
Index: dev/pci/if_nfereg.h
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/if_nfereg.h,v
retrieving revision 1.5
diff -u -r1.5 if_nfereg.h
--- dev/pci/if_nfereg.h 17 Dec 2007 12:41:07 -0000 1.5
+++ dev/pci/if_nfereg.h 25 Jan 2008 12:24:42 -0000
@@ -36,6 +36,7 @@
#define NFE_IRQ_MASK 0x004
#define NFE_SETUP_R6 0x008
#define NFE_IMTIMER 0x00c
+#define NFE_MAC_RESET 0x03c
#define NFE_MISC1 0x080
#define NFE_TX_CTL 0x084
#define NFE_TX_STATUS 0x088
@@ -76,12 +77,15 @@
#define NFE_PWR_CAP 0x268
#define NFE_PWR_STATE 0x26c
#define NFE_VTAG_CTL 0x300
+#define NFE_PWR2_CTL 0x600
#define NFE_PHY_ERROR 0x00001
#define NFE_PHY_WRITE 0x00400
#define NFE_PHY_BUSY 0x08000
#define NFE_PHYADD_SHIFT 5
+#define NFE_MAC_RESET_MAGIC 0x00f3
+
#define NFE_STATUS_MAGIC 0x140000
#define NFE_MAC_ADDR_INORDER 0x8000
@@ -129,6 +133,7 @@
#define NFE_PWR_VALID (1 << 8)
#define NFE_PWR_WAKEUP (1 << 15)
+#define NFE_PWR2_WAKEUP_MASK 0x0f11
#define NFE_MEDIA_SET 0x10000
#define NFE_MEDIA_1000T 0x00032
Index: dev/pci/if_nfevar.h
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/if_nfevar.h,v
retrieving revision 1.5
diff -u -r1.5 if_nfevar.h
--- dev/pci/if_nfevar.h 17 Dec 2007 12:41:07 -0000 1.5
+++ dev/pci/if_nfevar.h 25 Jan 2008 12:24:42 -0000
@@ -85,6 +85,7 @@
#define NFE_HW_VLAN 0x08
#define NFE_USE_JUMBO 0x10
#define NFE_CORRECT_MACADDR 0x20
+#define NFE_PWR_MGMT 0x40
uint32_t rxtxctl;
uint8_t mii_phyaddr;
---
Izumi Tsutsui
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