The following reply was made to PR port-mips/27298; it has been noted by GNATS.

From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: kilbi@rad.rwth-aachen.de
Cc: chs@NetBSD.org, port-mips-maintainer@NetBSD.org,
	gnats-bugs@NetBSD.org, gnats-admin@NetBSD.org,
	tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/27298 (FP trap handler bug (at least in cobalt port)
	 -> kernel panic)
Date: Wed, 22 Mar 2006 23:14:56 +0900

 >     chs> I tried to reproduce this problem with today's 3.x branch
 >     chs> but I wasn't able to.  are you still seeing this?
 > 
 > Yes, verified with yesterday's -current source. Adding 'options
 > MIPS3_PLUS' to kernel's config still 'solves' the problem.
 
 How about the attached patch?
 
 Maybe the problem is caused by:
 - arch/mips/mips/fp.S doesn't include <mips/cpu.h> for MIPS3_PLUS
 - <mips/cpu.h> never defines MIPS3_PLUS #ifdef _LOCORE
 
 BTW, it's still better to post a whole source which can reproduce
 your problem so that I will be able to confirm it on my RaQ2.
 ---
 
 Index: include/cpu.h
 ===================================================================
 RCS file: /cvsroot/src/sys/arch/mips/include/cpu.h,v
 retrieving revision 1.76
 diff -u -r1.76 cpu.h
 --- include/cpu.h	24 Dec 2005 22:50:08 -0000	1.76
 +++ include/cpu.h	22 Mar 2006 14:02:12 -0000
 @@ -110,13 +110,25 @@
  #endif
  
  #ifdef _KERNEL
 -#ifndef _LOCORE
 -extern struct cpu_info cpu_info_store;
 +#ifdef _LKM
 +/* Assume all CPU architectures are valid for LKM's */
 +#define	MIPS1	1
 +#define	MIPS3	1
 +#define	MIPS4	1
 +#define	MIPS32	1
 +#define	MIPS64	1
 +#endif
  
 -#define	curcpu()	(&cpu_info_store)
 -#define	cpu_number()	(0)
 -#define	cpu_proc_fork(p1, p2)
 -#endif /* !_LOCORE */
 +#if (MIPS1 + MIPS3 + MIPS4 + MIPS32 + MIPS64) == 0
 +#error at least one of MIPS1, MIPS3, MIPS4, MIPS32 or MIPS64 must be specified
 +#endif
 +
 +/* Shortcut for MIPS3 or above defined */
 +#if defined(MIPS3) || defined(MIPS4) || defined(MIPS32) || defined(MIPS64)
 +#define	MIPS3_PLUS	1
 +#else
 +#undef MIPS3_PLUS
 +#endif
  
  /*
   * Macros to find the CPU architecture we're on at run-time,
 @@ -133,6 +145,12 @@
  #define	CPU_ARCH_MIPS64	(1 << 6)
  
  #ifndef _LOCORE
 +extern struct cpu_info cpu_info_store;
 +
 +#define	curcpu()	(&cpu_info_store)
 +#define	cpu_number()	(0)
 +#define	cpu_proc_fork(p1, p2)
 +
  /* XXX simonb
   * Should the following be in a cpu_info type structure?
   * And how many of these are per-cpu vs. per-system?  (Ie,
 @@ -161,19 +179,6 @@
  #define	CPU_MIPS_I_D_CACHE_COHERENT	0x0800	/* I-cache funcs don't need to flush the D-cache */
  #define	MIPS_NOT_SUPP			0x8000
  
 -#ifdef _LKM
 -/* Assume all CPU architectures are valid for LKM's */
 -#define	MIPS1	1
 -#define	MIPS3	1
 -#define	MIPS4	1
 -#define	MIPS32	1
 -#define	MIPS64	1
 -#endif
 -
 -#if (MIPS1 + MIPS3 + MIPS4 + MIPS32 + MIPS64) == 0
 -#error at least one of MIPS1, MIPS3, MIPS4, MIPS32 or MIPS64 must be specified
 -#endif
 -
  #if (MIPS1 + MIPS3 + MIPS4 + MIPS32 + MIPS64) == 1
  #ifdef MIPS1
  # define CPUISMIPS3		0
 @@ -238,13 +243,6 @@
  #define	MIPS_HAS_CLOCK	(cpu_arch >= CPU_ARCH_MIPS3)
  #endif /* run-time test */
  
 -/* Shortcut for MIPS3 or above defined */
 -#if defined(MIPS3) || defined(MIPS4) || defined(MIPS32) || defined(MIPS64)
 -#define	MIPS3_PLUS	1
 -#else
 -#undef MIPS3_PLUS
 -#endif
 -
  
  /*
   * definitions of cpu-dependent requirements
 Index: mips/fp.S
 ===================================================================
 RCS file: /cvsroot/src/sys/arch/mips/mips/fp.S,v
 retrieving revision 1.29
 diff -u -r1.29 fp.S
 --- mips/fp.S	11 Dec 2005 12:18:09 -0000	1.29
 +++ mips/fp.S	22 Mar 2006 14:02:13 -0000
 @@ -37,7 +37,7 @@
  #include <sys/cdefs.h>
  
  #include <mips/asm.h>
 -#include <mips/cpuregs.h>
 +#include <mips/cpu.h>
  #include <mips/trap.h>
  
  #include "assym.h"