Subject: Re: port-powerpc/31386
To: None <port-powerpc-maintainer@netbsd.org, gnats-admin@netbsd.org,>
From: Hiroshi TOKUDA <tokuda@tokuda.net>
List: netbsd-bugs
Date: 11/10/2005 18:59:01
The following reply was made to PR port-powerpc/31386; it has been noted by GNATS.

From: Hiroshi TOKUDA <tokuda@tokuda.net>
To: gnats-bugs@netbsd.org
Cc: shige@netbsd.org, kiyohara@netbsd.org
Subject: Re: port-powerpc/31386
Date: Thu, 10 Nov 2005 18:53:55 +0000

 In lib/libpthread/arch/powerpc/pthread_md.h, The constant 0xd032, 
 which should really be PSL_USERSET is assigned to __gregs[__REG_MSR].
 
 54 /*
 55  * Set initial, sane values for registers whose values aren't just
 56  * "don't care".
 57  * 0xd032 is PSL_USERSET from arch/powerpc/include/psl.h
 58  */
 59 #define _INITCONTEXT_U_MD(ucp) \
 60	   (ucp)->uc_mcontext.__gregs[_REG_MSR] = 0xd032;
 
 But if you look at sys/arch/evbppc/include/psl.h, PSL_USERSET is 
 defined differently for PPC_IBM4XX as 0xc030:
 
 15 /* Apparently we get unexplained machine checks, so disable them. */
 16 #define PSL_USERSET (PSL_EE | PSL_PR | PSL_IR | PSL_DR)
 
 This is the reason why PSL_USEROK_P() is failed in sys/arch/powerpc/powerpc/sig_machdep.c.
 gr[__REG_MSR] should be 0xc030 while 0xd032 is assigned.
 
 226                if (!PSL_USEROK_P(gr[_REG_MSR]))
 227                        return (EINVAL);
 
 The workaround is the following patch.
 
 --- sig_machdep.c.orig  2005-10-22 14:24:14.000000000 +0000
 +++ sig_machdep.c       2005-11-10 18:23:41.000000000 +0000
 @@ -221,6 +221,9 @@
         struct pcb *pcb = &l->l_addr->u_pcb;
  #endif
  
 +#ifdef PPC_IBM4XX
 +       gr[_REG_MSR] &= ~(PSL_ME|PSL_RI);
 +#endif
         /* Restore GPR context, if any. */
         if (flags & _UC_CPU) {
                 if (!PSL_USEROK_P(gr[_REG_MSR]))
 
 Or
 
 --- sig_machdep.c.orig        2005-11-10 17:23:28.000000000 +0000
 +++ sig_machdep.c       2005-11-10 17:28:46.000000000 +0000
 @@ -221,6 +221,9 @@
         struct pcb *pcb = &l->l_addr->u_pcb;
  #endif
  
 +       gr[_REG_MSR] &= ~(PSL_ME|PSL_RI);
 +       gr[_REG_MSR] |= tf->srr1 & (PSL_ME|PSL_RI);
 +
         /* Restore GPR context, if any. */
         if (flags & _UC_CPU) {
                 if (!PSL_USEROK_P(gr[_REG_MSR]))
 
 Above is just a interim fix to let IBM405 works for pthread.
 
 The best solution should be following shape.
 (1) don't touch the fixed, should-not-be-changed bits.
 (2) changes only can-be-changed bits.