>Number:         23128
>Category:       kern
>Synopsis:       usb ehci "controller halted" fix
>Confidential:   no
>Severity:       serious
>Priority:       medium
>Responsible:    kern-bug-people
>State:          open
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Sat Oct 11 01:46:00 UTC 2003
>Closed-Date:
>Last-Modified:
>Originator:     Cliff Wright
>Release:        NetBSD 1.6.1
>Organization:
	
>Environment:
	
	
System: NetBSD vixen 1.6.1 NetBSD 1.6.1 (vixen) #0: Wed Jul 9 15:37:19 PDT 2003 cliff@vixen:/usr/src/sys/arch/i386/compile/vixen i386
Architecture: i386
Machine: i386
>Description:
	
	When the ehci usb driver is enabled on a machine where
	the controller is 64bit address capable, a
	"unrecoverable error, controller halted" message occurs.
>How-To-Repeat:
	
>Fix:
	
	Although the dma descriptors are limited to any 4G address range,
	the data is not, using extra area in the dma descriptors to
	define a 64 bit address. This is described in appendix B
	of the EHCI 1.0 spec from the URL in the file dev/usb/ehci.c.
	With a 64 bit address capable controller these upper address
	values must be set, the current driver does not do this.
	The below patches(to dir sys/dev/usb) add this,
	and a good halt ignore line.

--- ehci.c.orig	Wed Jun 18 20:09:00 2003
+++ ehci.c	Fri Oct 10 09:41:58 2003
@@ -719,6 +719,10 @@
 			break;
 
 		status = nstatus;
+		/* halt is ok if descriptor is last, and complete */
+		if(sqtd->qtd.qtd_next == EHCI_NULL
+			&& EHCI_QTD_GET_BYTES(status) == 0)
+			status &= ~EHCI_QTD_HALTED;
 		if (EHCI_QTD_GET_PID(status) !=	EHCI_QTD_PID_SETUP)
 			actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
 	}
@@ -2156,6 +2160,7 @@
 			if (i != 0) /* use offset only in first buffer */
 				a = EHCI_PAGE(a);
 			cur->qtd.qtd_buffer[i] = htole32(a);
+			cur->qtd.qtd_buffer_hi[i] = 0;
 #ifdef DIAGNOSTIC
 			if (i >= EHCI_QTD_NBUFFERS) {
 				printf("ehci_alloc_sqtd_chain: i=%d\n", i);
@@ -2536,6 +2541,7 @@
 	    EHCI_QTD_SET_BYTES(sizeof *req)
 	    );
 	setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma) + 0);
+	setup->qtd.qtd_buffer_hi[0] = 0;
 	setup->nextqtd = next;
 	setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
 	setup->xfer = xfer;
@@ -2548,6 +2554,7 @@
 	    EHCI_QTD_IOC
 	    );
 	stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
+	stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
 	stat->nextqtd = NULL;
 	stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
 	stat->xfer = xfer;
--- ehcireg.h.orig	Thu Nov 22 17:16:27 2001
+++ ehcireg.h	Thu Oct  9 19:32:59 2003
@@ -231,6 +231,7 @@
 #define EHCI_QTD_GET_TOGGLE(x)	(((x) >> 31) &  0x1)
 #define EHCI_QTD_TOGGLE		0x80000000
 	ehci_physaddr_t	qtd_buffer[EHCI_QTD_NBUFFERS];
+	ehci_physaddr_t	qtd_buffer_hi[EHCI_QTD_NBUFFERS];
 } ehci_qtd_t;
 #define EHCI_QTD_ALIGN 32
 
>Release-Note:
>Audit-Trail:
>Unformatted: