> Any ideas what would be blocking the interrupts?
> Anyone have any ideas how to (easily) spot the culprit?

Dunno, last time I solved this the interrupt request line
was visible externally.  We set a logic analiser to trigger
if the IRQ stayed active for more than 'x usec' and used
the trigger output to generate an NMI interrupt on which
the system crashed and dumped.
(The NMI line is nicely available on the ISA bus opposite
a ground pin - you can generate an NMI with a screwdriver!)

If the clock interrupt uses a soft interrupt for everything
except increment 'real time', then you might be able to
do something in the clock ISR.

	David

-- 
David Laight: david@l8s.co.uk