>Number:         14851
>Category:       port-sparc
>Synopsis:       intro(4) does not list HyperSPARC CPU modules as supported
>Confidential:   no
>Severity:       non-critical
>Priority:       low
>Responsible:    port-sparc-maintainer
>State:          open
>Class:          doc-bug
>Submitter-Id:   net
>Arrival-Date:   Thu Dec 06 02:34:01 PST 2001
>Closed-Date:
>Last-Modified:
>Originator:     Erik E. Fair
>Release:        20011205
>Organization:
	The NetBSD Project
>Environment:
	
System: NetBSD cesium.clock.org 1.4.3A NetBSD 1.4.3A (CESIUM) #6: Wed Apr 18 15:31:40 PDT 2001 root@cesium.clock.org:/usr/obj/sys/arch/sparc/compile/CESIUM sparc


>Description:
	the intro(4) man page for SPARC should list the Ross HyperSPARC
	CPU Mbus modules as supported (they are, since 1.4).
>How-To-Repeat:
	read intro(4) on a Sun SPARCstation 20 with 150 MHz HyperSPARC CPU.
>Fix:
	
>Release-Note:
>Audit-Trail:
>Unformatted: