Subject: kern/10032: A *real* MI am7930 audio driver
To: None <gnats-bugs@gnats.netbsd.org>
From: None <g.mcgarry@ieee.org>
List: netbsd-bugs
Date: 05/01/2000 15:28:55
>Number: 10032
>Category: kern
>Synopsis: A *real* MI am7930 audio driver
>Confidential: no
>Severity: non-critical
>Priority: low
>Responsible: kern-bug-people
>State: open
>Class: change-request
>Submitter-Id: net
>Arrival-Date: Mon May 01 15:29:00 PDT 2000
>Closed-Date:
>Last-Modified:
>Originator: Gregory McGarry
>Release: 1.4X
>Organization:
>Environment:
NetBSD/pmax
>Description:
The am7930 isdn/audio driver isn't really MI. It can be programmed
in a number of different ways depending on how it is connected to
the host. These changes allow the driver to work on NetBSD/sparc,
NetBSD/alpha and NetBSD/pmax. Changes to the MD drivers will follow.
>How-To-Repeat:
>Fix:
*** am7930.c.orig Thu Jan 20 12:28:58 2000
--- am7930.c Sun Apr 30 12:27:17 2000
***************
*** 1,4 ****
! /* $NetBSD: am7930.c,v 1.41 1999/03/14 22:29:01 jonathan Exp $ */
/*
* Copyright (c) 1995 Rolf Grossmann
--- 1,4 ----
! /* $NetBSD$ */
/*
* Copyright (c) 1995 Rolf Grossmann
***************
*** 32,38 ****
/*
* Front-end attachment independent layer for AMD 79c30
! * audio driver. XXX isdn support??
*/
#include "audio.h"
--- 32,38 ----
/*
* Front-end attachment independent layer for AMD 79c30
! * audio driver. No ISDN support.
*/
#include "audio.h"
***************
*** 53,83 ****
#include <dev/audio_if.h>
#include <dev/ic/am7930reg.h>
- #include <machine/am7930_machdep.h>
#include <dev/ic/am7930var.h>
- #define AUDIO_ROM_NAME "audio"
-
#ifdef AUDIO_DEBUG
-
int am7930debug = 0;
#define DPRINTF(x) if (am7930debug) printf x
#else
#define DPRINTF(x)
#endif
- /* forward declarations */
- static void init_amd __P((bus_space_tag_t bt, bus_space_handle_t bh));
-
- /*
- * Audio device descriptor (attachment independent)
- */
-
- struct audio_device am7930_device = {
- "amd7930",
- "x",
- "audioamd"
- };
/* The following tables stolen from former (4.4Lite's) sys/sparc/bsd_audio.c */
--- 53,67 ----
***************
*** 155,201 ****
* Reset chip and set boot-time softc defaults.
*/
void
! am7930_init(sc)
struct am7930_softc *sc;
{
- /* Save bustag and handle in pdma struct. XXX is this MI? */
- sc->sc_au.au_bt = sc->sc_bustag;
- sc->sc_au.au_bh = sc->sc_bh;
! sc->sc_map.mr_mmr1 = AMD_MMR1_GX | AMD_MMR1_GER |
! AMD_MMR1_GR | AMD_MMR1_STG;
/* set boot defaults */
sc->sc_rlevel = 128;
sc->sc_plevel = 128;
sc->sc_mlevel = 0;
! sc->sc_out_port = SUNAUDIO_SPEAKER;
! init_amd(sc->sc_bustag, sc->sc_bh);
! }
- static void
- init_amd(bt, bh)
- register bus_space_tag_t bt;
- register bus_space_handle_t bh;
- {
- /* disable interrupts */
- AM7930_WRITE_REG(bt, bh, cr, AMDR_INIT);
- AM7930_WRITE_REG(bt, bh, dr,
- AMD_INIT_PMS_ACTIVE | AMD_INIT_INT_DISABLE);
-
- /*
- * Initialize the mux unit. We use MCR3 to route audio (MAP)
- * through channel Bb. MCR1 and MCR2 are unused.
- * Setting the INT enable bit in MCR4 will generate an interrupt
- * on each converted audio sample.
- */
- AM7930_WRITE_REG(bt, bh, cr, AMDR_MUX_1_4);
- AM7930_WRITE_REG(bt, bh, dr, 0);
- AM7930_WRITE_REG(bt, bh, dr, 0);
- AM7930_WRITE_REG(bt, bh, dr, (AMD_MCRCHAN_BB << 4) | AMD_MCRCHAN_BA);
- AM7930_WRITE_REG(bt, bh, dr, AMD_MCR4_INT_ENABLE);
}
int
am7930_open(addr, flags)
void *addr;
--- 139,197 ----
* Reset chip and set boot-time softc defaults.
*/
void
! am7930_init(sc, flag)
struct am7930_softc *sc;
+ int flag;
{
! DPRINTF(("am7930_init()\n"));
/* set boot defaults */
sc->sc_rlevel = 128;
sc->sc_plevel = 128;
sc->sc_mlevel = 0;
! sc->sc_out_port = AUDIOAMD_SPEAKER_VOL;
! sc->sc_mic_mute = 0;
!
! /* disable sample interrupts */
! AM7930_IWRITE(sc, AM7930_IREG_MUX_MCR4, 0);
!
! /* initialise voice and data, and disable interrupts */
! AM7930_IWRITE(sc, AM7930_IREG_INIT,
! AM7930_INIT_PMS_ACTIVE | AM7930_INIT_INT_DISABLE);
!
! if (flag == AUDIOAMD_DMA_MODE) {
!
! /* configure PP for serial (SBP) mode */
! AM7930_IWRITE(sc, AM7930_IREG_PP_PPCR1, AM7930_PPCR1_SBP);
!
! /*
! * Initialise the MUX unit - route the MAP to the PP
! */
! AM7930_IWRITE(sc, AM7930_IREG_MUX_MCR1,
! (AM7930_MCRCHAN_BA << 4) | AM7930_MCRCHAN_BD);
! AM7930_IWRITE(sc, AM7930_IREG_MUX_MCR2, AM7930_MCRCHAN_NC);
! AM7930_IWRITE(sc, AM7930_IREG_MUX_MCR3, AM7930_MCRCHAN_NC);
!
! } else {
!
! /*
! * Initialize the MUX unit. We use MCR3 to route the MAP
! * through channel Bb. MCR1 and MCR2 are unused.
! * Setting the INT enable bit in MCR4 will generate an
! * interrupt on each converted audio sample.
! */
! AM7930_IWRITE(sc, AM7930_IREG_MUX_MCR1, 0);
! AM7930_IWRITE(sc, AM7930_IREG_MUX_MCR2, 0);
! AM7930_IWRITE(sc, AM7930_IREG_MUX_MCR3,
! (AM7930_MCRCHAN_BB << 4) | AM7930_MCRCHAN_BA);
! AM7930_IWRITE(sc, AM7930_IREG_MUX_MCR4,
! AM7930_MCR4_INT_ENABLE);
! }
}
+
int
am7930_open(addr, flags)
void *addr;
***************
*** 210,217 ****
sc->sc_open = 1;
sc->sc_locked = 0;
! /* tell attach layer about open */
! sc->sc_onopen(sc);
DPRINTF(("saopen: ok -> sc=0x%p\n",sc));
--- 206,212 ----
sc->sc_open = 1;
sc->sc_locked = 0;
! sc->sc_glue->onopen(sc);
DPRINTF(("saopen: ok -> sc=0x%p\n",sc));
***************
*** 225,251 ****
register struct am7930_softc *sc = addr;
DPRINTF(("sa_close: sc=%p\n", sc));
! /*
! * halt i/o, clear open flag, and done.
! */
! sc->sc_onclose(sc);
sc->sc_open = 0;
DPRINTF(("sa_close: closed.\n"));
}
int
am7930_set_params(addr, setmode, usemode, p, r)
void *addr;
int setmode, usemode;
struct audio_params *p, *r;
{
! if (p->sample_rate < 7500 || p->sample_rate > 8500 ||
! p->encoding != AUDIO_ENCODING_ULAW ||
! p->precision != 8 ||
! p->channels != 1)
! return EINVAL;
! p->sample_rate = 8000; /* no other sampling rates supported by amd chip */
return 0;
}
--- 220,268 ----
register struct am7930_softc *sc = addr;
DPRINTF(("sa_close: sc=%p\n", sc));
!
! sc->sc_glue->onclose(sc);
sc->sc_open = 0;
DPRINTF(("sa_close: closed.\n"));
}
+
+ /*
+ * XXX should be extended to handle a few of the more common formats.
+ */
int
am7930_set_params(addr, setmode, usemode, p, r)
void *addr;
int setmode, usemode;
struct audio_params *p, *r;
{
! struct am7930_softc *sc = addr;
!
! if ((usemode & AUMODE_PLAY) == AUMODE_PLAY) {
! if (p->sample_rate < 7500 || p->sample_rate > 8500 ||
! p->encoding != AUDIO_ENCODING_ULAW ||
! p->precision != 8 ||
! p->channels != 1)
! return EINVAL;
! p->sample_rate = 8000;
! if (sc->sc_glue->factor > 1) {
! p->factor = sc->sc_glue->factor;
! p->sw_code = sc->sc_glue->output_conv;
! }
! }
! if ((usemode & AUMODE_RECORD) == AUMODE_RECORD) {
! if (r->sample_rate < 7500 || r->sample_rate > 8500 ||
! r->encoding != AUDIO_ENCODING_ULAW ||
! r->precision != 8 ||
! r->channels != 1)
! return EINVAL;
! r->sample_rate = 8000;
! if (sc->sc_glue->factor > 1) {
! r->factor = sc->sc_glue->factor;
! r->sw_code = sc->sc_glue->input_conv;
! }
! }
return 0;
}
***************
*** 278,380 ****
return(blk);
}
int
am7930_commit_settings(addr)
void *addr;
{
! register struct am7930_softc *sc = addr;
! register struct mapreg *map;
! register bus_space_tag_t bt = sc->sc_bustag;
! register bus_space_handle_t bh = sc->sc_bh;
! register int s, level;
DPRINTF(("sa_commit.\n"));
! map = &sc->sc_map;
!
! map->mr_gx = gx_coeff[sc->sc_rlevel];
! map->mr_stgr = gx_coeff[sc->sc_mlevel];
level = (sc->sc_plevel * (256 + NGER)) >> 8;
if (level >= 256) {
! map->mr_ger = ger_coeff[level - 256];
! map->mr_gr = gx_coeff[255];
} else {
! map->mr_ger = ger_coeff[0];
! map->mr_gr = gx_coeff[level];
}
- if (sc->sc_out_port == SUNAUDIO_SPEAKER)
- map->mr_mmr2 |= AMD_MMR2_LS;
- else
- map->mr_mmr2 &= ~AMD_MMR2_LS;
-
s = splaudio();
! AM7930_WRITE_REG(bt, bh, cr, AMDR_MAP_MMR1);
! AM7930_WRITE_REG(bt, bh, dr, map->mr_mmr1);
! AM7930_WRITE_REG(bt, bh, cr, AMDR_MAP_GX);
! WAMD16(bt, bh, map->mr_gx);
!
! AM7930_WRITE_REG(bt, bh, cr, AMDR_MAP_STG);
! WAMD16(bt, bh, map->mr_stgr);
!
! AM7930_WRITE_REG(bt, bh, cr, AMDR_MAP_GR);
! WAMD16(bt, bh, map->mr_gr);
! AM7930_WRITE_REG(bt, bh, cr, AMDR_MAP_GER);
! WAMD16(bt, bh, map->mr_ger);
! AM7930_WRITE_REG(bt, bh, cr, AMDR_MAP_MMR2);
! AM7930_WRITE_REG(bt, bh, dr, map->mr_mmr2);
splx(s);
return(0);
}
int
am7930_halt_output(addr)
void *addr;
{
! register struct am7930_softc *sc = addr;
! register bus_space_tag_t bt = sc->sc_bustag;
! register bus_space_handle_t bh = sc->sc_bh;
/* XXX only halt, if input is also halted ?? */
! AM7930_WRITE_REG(bt, bh, cr, AMDR_INIT);
! AM7930_WRITE_REG(bt, bh, dr,
! AMD_INIT_PMS_ACTIVE | AMD_INIT_INT_DISABLE);
sc->sc_locked = 0;
return(0);
}
int
am7930_halt_input(addr)
void *addr;
{
! register struct am7930_softc *sc = addr;
! register bus_space_tag_t bt = sc->sc_bustag;
! register bus_space_handle_t bh = sc->sc_bh;
/* XXX only halt, if output is also halted ?? */
! AM7930_WRITE_REG(bt, bh, cr, AMDR_INIT);
! AM7930_WRITE_REG(bt, bh, dr,
! AMD_INIT_PMS_ACTIVE | AMD_INIT_INT_DISABLE);
sc->sc_locked = 0;
return(0);
}
- int
- am7930_getdev(addr, retp)
- void *addr;
- struct audio_device *retp;
- {
- *retp = am7930_device;
- return 0;
- }
-
/*
* XXX chip is full-duplex, but really attach-dependent.
--- 295,384 ----
return(blk);
}
+
int
am7930_commit_settings(addr)
void *addr;
{
! struct am7930_softc *sc = addr;
! u_int16_t ger, gr, gx, stgr;
! u_int8_t mmr2, mmr3;
! int s, level;
DPRINTF(("sa_commit.\n"));
! gx = gx_coeff[sc->sc_rlevel];
! stgr = gx_coeff[sc->sc_mlevel];
level = (sc->sc_plevel * (256 + NGER)) >> 8;
if (level >= 256) {
! ger = ger_coeff[level - 256];
! gr = gx_coeff[255];
} else {
! ger = ger_coeff[0];
! gr = gx_coeff[level];
}
s = splaudio();
! mmr2 = AM7930_IREAD(sc, AM7930_IREG_MAP_MMR2);
! if (sc->sc_out_port == AUDIOAMD_SPEAKER_VOL)
! mmr2 |= AM7930_MMR2_LS;
! else
! mmr2 &= ~AM7930_MMR2_LS;
! AM7930_IWRITE(sc, AM7930_IREG_MAP_MMR2, mmr2);
! mmr3 = AM7930_IREAD(sc, AM7930_IREG_MAP_MMR3);
! if (sc->sc_mic_mute)
! mmr3 |= AM7930_MMR3_MUTE;
! else
! mmr3 &= ~AM7930_MMR3_MUTE;
! AM7930_IWRITE(sc, AM7930_IREG_MAP_MMR3, mmr3);
! AM7930_IWRITE(sc, AM7930_IREG_MAP_MMR1,
! AM7930_MMR1_GX | AM7930_MMR1_GER |
! AM7930_MMR1_GR | AM7930_MMR1_STG);
!
! AM7930_IWRITE16(sc, AM7930_IREG_MAP_GX, gx);
! AM7930_IWRITE16(sc, AM7930_IREG_MAP_STG, stgr);
! AM7930_IWRITE16(sc, AM7930_IREG_MAP_GR, gr);
! AM7930_IWRITE16(sc, AM7930_IREG_MAP_GER, ger);
splx(s);
+
return(0);
}
+
int
am7930_halt_output(addr)
void *addr;
{
! struct am7930_softc *sc = addr;
/* XXX only halt, if input is also halted ?? */
! AM7930_IWRITE(sc, AM7930_IREG_INIT,
! AM7930_INIT_PMS_ACTIVE | AM7930_INIT_INT_DISABLE);
sc->sc_locked = 0;
return(0);
}
+
int
am7930_halt_input(addr)
void *addr;
{
! struct am7930_softc *sc = addr;
/* XXX only halt, if output is also halted ?? */
! AM7930_IWRITE(sc, AM7930_IREG_INIT,
! AM7930_INIT_PMS_ACTIVE | AM7930_INIT_INT_DISABLE);
sc->sc_locked = 0;
return(0);
}
/*
* XXX chip is full-duplex, but really attach-dependent.
***************
*** 386,389 ****
--- 390,605 ----
{
return AUDIO_PROP_FULLDUPLEX;
}
+
+ /*
+ * Attach-dependent channel set/query
+ */
+ int
+ am7930_set_port(addr, cp)
+ void *addr;
+ mixer_ctrl_t *cp;
+ {
+ struct am7930_softc *sc = addr;
+
+ DPRINTF(("am7930_set_port: port=%d", cp->dev));
+
+ if (cp->dev == AUDIOAMD_RECORD_SOURCE ||
+ cp->dev == AUDIOAMD_MONITOR_OUTPUT ||
+ cp->dev == AUDIOAMD_MIC_MUTE) {
+ if (cp->type != AUDIO_MIXER_ENUM)
+ return(EINVAL);
+ } else if (cp->type != AUDIO_MIXER_VALUE ||
+ cp->un.value.num_channels != 1) {
+ return(EINVAL);
+ }
+
+ switch(cp->dev) {
+ case AUDIOAMD_MIC_VOL:
+ sc->sc_rlevel = cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
+ break;
+ case AUDIOAMD_SPEAKER_VOL:
+ case AUDIOAMD_HEADPHONES_VOL:
+ sc->sc_plevel = cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
+ break;
+ case AUDIOAMD_MONITOR_VOL:
+ sc->sc_mlevel = cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
+ break;
+ case AUDIOAMD_RECORD_SOURCE:
+ if (cp->un.ord != AUDIOAMD_MIC_VOL)
+ return EINVAL;
+ break;
+ case AUDIOAMD_MIC_MUTE:
+ sc->sc_mic_mute = cp->un.ord;
+ break;
+ case AUDIOAMD_MONITOR_OUTPUT:
+ if (cp->un.ord != AUDIOAMD_SPEAKER_VOL &&
+ cp->un.ord != AUDIOAMD_HEADPHONES_VOL)
+ return EINVAL;
+ sc->sc_out_port = cp->un.ord;
+ break;
+ default:
+ return(EINVAL);
+ /* NOTREACHED */
+ }
+ return 0;
+ }
+
+ int
+ am7930_get_port(addr, cp)
+ void *addr;
+ mixer_ctrl_t *cp;
+ {
+ struct am7930_softc *sc = addr;
+
+ DPRINTF(("am7930_get_port: port=%d\n", cp->dev));
+
+ if (cp->dev == AUDIOAMD_RECORD_SOURCE ||
+ cp->dev == AUDIOAMD_MONITOR_OUTPUT ||
+ cp->dev == AUDIOAMD_MIC_MUTE) {
+ if (cp->type != AUDIO_MIXER_ENUM)
+ return(EINVAL);
+ } else if (cp->type != AUDIO_MIXER_VALUE ||
+ cp->un.value.num_channels != 1) {
+ return(EINVAL);
+ }
+
+ switch(cp->dev) {
+ case AUDIOAMD_MIC_VOL:
+ cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_rlevel;
+ break;
+ case AUDIOAMD_SPEAKER_VOL:
+ case AUDIOAMD_HEADPHONES_VOL:
+ cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_plevel;
+ break;
+ case AUDIOAMD_MONITOR_VOL:
+ cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_mlevel;
+ break;
+ case AUDIOAMD_RECORD_SOURCE:
+ cp->un.ord = AUDIOAMD_MIC_VOL;
+ break;
+ case AUDIOAMD_MIC_MUTE:
+ cp->un.ord = sc->sc_mic_mute;
+ break;
+ case AUDIOAMD_MONITOR_OUTPUT:
+ cp->un.ord = sc->sc_out_port;
+ break;
+ default:
+ return(EINVAL);
+ /* NOTREACHED */
+ }
+ return 0;
+ }
+
+
+ /*
+ * Define mixer control facilities.
+ */
+ int
+ am7930_query_devinfo(addr, dip)
+ void *addr;
+ register mixer_devinfo_t *dip;
+ {
+
+ DPRINTF(("am7930_query_devinfo()\n"));
+
+ switch(dip->index) {
+ case AUDIOAMD_MIC_VOL:
+ dip->type = AUDIO_MIXER_VALUE;
+ dip->mixer_class = AUDIOAMD_INPUT_CLASS;
+ dip->prev = AUDIO_MIXER_LAST;
+ dip->next = AUDIOAMD_MIC_MUTE;
+ strcpy(dip->label.name, AudioNmicrophone);
+ dip->un.v.num_channels = 1;
+ strcpy(dip->un.v.units.name, AudioNvolume);
+ break;
+ case AUDIOAMD_SPEAKER_VOL:
+ dip->type = AUDIO_MIXER_VALUE;
+ dip->mixer_class = AUDIOAMD_OUTPUT_CLASS;
+ dip->prev = dip->next = AUDIO_MIXER_LAST;
+ strcpy(dip->label.name, AudioNspeaker);
+ dip->un.v.num_channels = 1;
+ strcpy(dip->un.v.units.name, AudioNvolume);
+ break;
+ case AUDIOAMD_HEADPHONES_VOL:
+ dip->type = AUDIO_MIXER_VALUE;
+ dip->mixer_class = AUDIOAMD_OUTPUT_CLASS;
+ dip->prev = dip->next = AUDIO_MIXER_LAST;
+ strcpy(dip->label.name, AudioNheadphone);
+ dip->un.v.num_channels = 1;
+ strcpy(dip->un.v.units.name, AudioNvolume);
+ break;
+ case AUDIOAMD_MONITOR_VOL:
+ dip->type = AUDIO_MIXER_VALUE;
+ dip->mixer_class = AUDIOAMD_MONITOR_CLASS;
+ dip->prev = dip->next = AUDIO_MIXER_LAST;
+ strcpy(dip->label.name, AudioNmonitor);
+ dip->un.v.num_channels = 1;
+ strcpy(dip->un.v.units.name, AudioNvolume);
+ break;
+ case AUDIOAMD_RECORD_SOURCE:
+ dip->type = AUDIO_MIXER_ENUM;
+ dip->mixer_class = AUDIOAMD_RECORD_CLASS;
+ dip->next = dip->prev = AUDIO_MIXER_LAST;
+ strcpy(dip->label.name, AudioNsource);
+ dip->un.e.num_mem = 1;
+ strcpy(dip->un.e.member[0].label.name, AudioNmicrophone);
+ dip->un.e.member[0].ord = AUDIOAMD_MIC_VOL;
+ break;
+ case AUDIOAMD_MONITOR_OUTPUT:
+ dip->type = AUDIO_MIXER_ENUM;
+ dip->mixer_class = AUDIOAMD_MONITOR_CLASS;
+ dip->next = dip->prev = AUDIO_MIXER_LAST;
+ strcpy(dip->label.name, AudioNoutput);
+ dip->un.e.num_mem = 2;
+ strcpy(dip->un.e.member[0].label.name, AudioNspeaker);
+ dip->un.e.member[0].ord = AUDIOAMD_SPEAKER_VOL;
+ strcpy(dip->un.e.member[1].label.name, AudioNheadphone);
+ dip->un.e.member[1].ord = AUDIOAMD_HEADPHONES_VOL;
+ break;
+ case AUDIOAMD_MIC_MUTE:
+ dip->type = AUDIO_MIXER_ENUM;
+ dip->mixer_class = AUDIOAMD_INPUT_CLASS;
+ dip->prev = AUDIOAMD_MIC_VOL;
+ dip->next = AUDIO_MIXER_LAST;
+ strcpy(dip->label.name, AudioNmute);
+ dip->un.e.num_mem = 2;
+ strcpy(dip->un.e.member[0].label.name, AudioNoff);
+ dip->un.e.member[0].ord = 0;
+ strcpy(dip->un.e.member[1].label.name, AudioNon);
+ dip->un.e.member[1].ord = 1;
+ break;
+ case AUDIOAMD_INPUT_CLASS:
+ dip->type = AUDIO_MIXER_CLASS;
+ dip->mixer_class = AUDIOAMD_INPUT_CLASS;
+ dip->next = dip->prev = AUDIO_MIXER_LAST;
+ strcpy(dip->label.name, AudioCinputs);
+ break;
+ case AUDIOAMD_OUTPUT_CLASS:
+ dip->type = AUDIO_MIXER_CLASS;
+ dip->mixer_class = AUDIOAMD_OUTPUT_CLASS;
+ dip->next = dip->prev = AUDIO_MIXER_LAST;
+ strcpy(dip->label.name, AudioCoutputs);
+ break;
+ case AUDIOAMD_RECORD_CLASS:
+ dip->type = AUDIO_MIXER_CLASS;
+ dip->mixer_class = AUDIOAMD_RECORD_CLASS;
+ dip->next = dip->prev = AUDIO_MIXER_LAST;
+ strcpy(dip->label.name, AudioCrecord);
+ break;
+ case AUDIOAMD_MONITOR_CLASS:
+ dip->type = AUDIO_MIXER_CLASS;
+ dip->mixer_class = AUDIOAMD_MONITOR_CLASS;
+ dip->next = dip->prev = AUDIO_MIXER_LAST;
+ strcpy(dip->label.name, AudioCmonitor);
+ break;
+ default:
+ return ENXIO;
+ /*NOTREACHED*/
+ }
+
+ DPRINTF(("AUDIO_MIXER_DEVINFO: name=%s\n", dip->label.name));
+
+ return(0);
+ }
+
#endif /* NAUDIO */
*** am7930reg.h.orig Thu Jan 20 12:39:58 2000
--- am7930reg.h Thu Jan 20 12:40:31 2000
***************
*** 1,167 ****
! /* $NetBSD: am7930reg.h,v 1.3 1999/03/14 22:29:01 jonathan Exp $ */
/*
! * Copyright (c) 1992, 1993
! * The Regents of the University of California. All rights reserved.
! *
! * This software was developed by the Computer Systems Engineering group
! * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
! * contributed to Berkeley.
! *
! * All advertising materials mentioning features or use of this software
! * must display the following acknowledgement:
! * This product includes software developed by the University of
! * California, Lawrence Berkeley Laboratory.
! *
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions
! * are met:
! * 1. Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * 2. Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! * 3. All advertising materials mentioning features or use of this software
! * must display the following acknowledgement:
! * This product includes software developed by the University of
! * California, Berkeley and its contributors.
! * 4. Neither the name of the University nor the names of its contributors
! * may be used to endorse or promote products derived from this software
! * without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
! * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
! * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
! * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
! * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
! * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
! * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
! * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
! * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
! * SUCH DAMAGE.
! *
! * @(#)bsd_audioreg.h 8.1 (Berkeley) 6/11/93
*/
/*
! * Bit encodings for chip commands from "Microprocessor Access Guide for
! * Indirect Registers", p.19 Am79C30A/32A Advanced Micro Devices spec
! * sheet (preliminary).
! *
! * Indirect register numbers (the value written into cr to select a given
! * chip registers) have the form AMDR_*. Register fields look like AMD_*.
*/
! struct am7930 {
! u_char cr; /* command register (wo) */
! #define ir cr /* interrupt register (ro) */
! u_char dr; /* data register (rw) */
! u_char dsr1; /* D-channel status register 1 (ro) */
! u_char der; /* D-channel error register (ro) */
! u_char dctb; /* D-channel transmit register (wo) */
! #define dcrb dctb /* D-channel receive register (ro) */
! u_char bbtb; /* Bb-channel transmit register (wo) */
! #define bbrb bbtb /* Bb-channel receive register (ro) */
! u_char bctb; /* Bc-channel transmit register (wo) */
! #define bcrb bctb /* Bc-channel receive register (ro) */
! u_char dsr2; /* D-channel status register 2 (ro) */
! };
!
! #define REG_CR offsetof(struct am7930, cr)
! #define REG_DR offsetof(struct am7930, dr)
! #define RREG_DSR1 offsetof(struct am7930, dsr1r)
! #define REG_DER offsetof(struct am7930, der)
! #define REG_DCTB offsetof(struct am7930, dctb)
! #define REG_BCTB offsetof(struct am7930, bctb)
! #define REG_DSR2 offsetof(struct am7930, dsr2)
!
! /* aliases */
! #define REG_DCRB AM7930_REG_DCTB
! #define REG_BBRB AM7930_REG_BBTB
! #define REG_BCRB AM7930_REG_BCTB
!
!
! #define AMDR_INIT 0x21
! #define AMD_INIT_PMS_IDLE 0x00
! #define AMD_INIT_PMS_ACTIVE 0x01
! #define AMD_INIT_PMS_ACTIVE_DATA 0x02
! #define AMD_INIT_INT_DISABLE (0x01 << 2)
! #define AMD_INIT_CDS_DIV2 (0x00 << 3)
! #define AMD_INIT_CDS_DIV1 (0x01 << 3)
! #define AMD_INIT_CDS_DIV4 (0x02 << 3)
! #define AMD_INIT_AS_RX (0x01 << 6)
! #define AMD_INIT_AS_TX (0x01 << 7)
!
! #define AMDR_LIU_LSR 0xa1
! #define AMDR_LIU_LPR 0xa2
! #define AMDR_LIU_LMR1 0xa3
! #define AMDR_LIU_LMR2 0xa4
! #define AMDR_LIU_2_4 0xa5
! #define AMDR_LIU_MF 0xa6
! #define AMDR_LIU_MFSB 0xa7
! #define AMDR_LIU_MFQB 0xa8
!
! #define AMDR_MUX_MCR1 0x41
! #define AMDR_MUX_MCR2 0x42
! #define AMDR_MUX_MCR3 0x43
! #define AMD_MCRCHAN_NC 0x00
! #define AMD_MCRCHAN_B1 0x01
! #define AMD_MCRCHAN_B2 0x02
! #define AMD_MCRCHAN_BA 0x03
! #define AMD_MCRCHAN_BB 0x04
! #define AMD_MCRCHAN_BC 0x05
! #define AMD_MCRCHAN_BD 0x06
! #define AMD_MCRCHAN_BE 0x07
! #define AMD_MCRCHAN_BF 0x08
! #define AMDR_MUX_MCR4 0x44
! #define AMD_MCR4_INT_ENABLE (1 << 3)
! #define AMD_MCR4_SWAPBB (1 << 4)
! #define AMD_MCR4_SWAPBC (1 << 5)
!
! #define AMDR_MUX_1_4 0x45
!
! #define AMDR_MAP_X 0x61
! #define AMDR_MAP_R 0x62
! #define AMDR_MAP_GX 0x63
! #define AMDR_MAP_GR 0x64
! #define AMDR_MAP_GER 0x65
! #define AMDR_MAP_STG 0x66
! #define AMDR_MAP_FTGR 0x67
! #define AMDR_MAP_ATGR 0x68
! #define AMDR_MAP_MMR1 0x69
! #define AMD_MMR1_ALAW 0x01
! #define AMD_MMR1_GX 0x02
! #define AMD_MMR1_GR 0x04
! #define AMD_MMR1_GER 0x08
! #define AMD_MMR1_X 0x10
! #define AMD_MMR1_R 0x20
! #define AMD_MMR1_STG 0x40
! #define AMD_MMR1_LOOP 0x80
! #define AMDR_MAP_MMR2 0x6a
! #define AMD_MMR2_AINB 0x01
! #define AMD_MMR2_LS 0x02
! #define AMD_MMR2_DTMF 0x04
! #define AMD_MMR2_GEN 0x08
! #define AMD_MMR2_RNG 0x10
! #define AMD_MMR2_DIS_HPF 0x20
! #define AMD_MMR2_DIS_AZ 0x40
! #define AMDR_MAP_1_10 0x6b
!
! #define AMDR_DLC_FRAR123 0x81
! #define AMDR_DLC_SRAR123 0x82
! #define AMDR_DLC_TAR 0x83
! #define AMDR_DLC_DRLR 0x84
! #define AMDR_DLC_DTCR 0x85
! #define AMDR_DLC_DMR1 0x86
! #define AMDR_DLC_DMR2 0x87
! #define AMDR_DLC_1_7 0x88
! #define AMDR_DLC_DRCR 0x89
! #define AMDR_DLC_RNGR1 0x8a
! #define AMDR_DLC_RNGR2 0x8b
! #define AMDR_DLC_FRAR4 0x8c
! #define AMDR_DLC_SRAR4 0x8d
! #define AMDR_DLC_DMR3 0x8e
! #define AMDR_DLC_DMR4 0x8f
! #define AMDR_DLC_12_15 0x90
! #define AMDR_DLC_ASR 0x91
--- 1,167 ----
! /* $NetBSD$ */
/*
! * Am79C30A direct registers
*/
+ #define AM7930_DREG_CR 0 /* command register (wo) */
+ #define AM7930_DREG_IR 0 /* interrupt register (ro) */
+ #define AM7930_IR_DTTHRSH 0x01 /* D-channel TX empty */
+ #define AM7930_IR_DRTHRSH 0x02 /* D-channel RX avail */
+ #define AM7930_IR_DSRI 0x04 /* D-channel packet status */
+ #define AM7930_IR_DERI 0x08 /* D-channel error */
+ #define AM7930_IR_BBUFF 0x10 /* Bb or Bc byte avail/empty */
+ #define AM7930_IR_LSRI 0x20 /* LIU status */
+ #define AM7930_IR_DSR2I 0x40 /* D-channel buffer status */
+ #define AM7930_IR_PPMF 0x80 /* Multiframe or PP */
+ #define AM7930_DREG_DR 1 /* data register (rw) */
+ #define AM7930_DREG_DSR1 2 /* D-channel status register 1 (ro) */
+ #define AM7930_DREG_DER 3 /* D-channel error register (ro) */
+ #define AM7930_DREG_DCTB 4 /* D-channel transmit register (wo) */
+ #define AM7930_DREG_DCRB 4 /* D-channel receive register (ro) */
+ #define AM7930_DREG_BBTB 5 /* Bb-channel transmit register (wo) */
+ #define AM7930_DREG_BBRB 5 /* Bb-channel receive register (ro) */
+ #define AM7930_DREG_BCTB 6 /* Bc-channel transmit register (wo) */
+ #define AM7930_DREG_BCRB 6 /* Bc-channel receive register (ro) */
+ #define AM7930_DREG_DSR2 7 /* D-channel status register 2 (ro) */
+
/*
! * Am79C30A indirect registers
*/
! /* Initialisation registers */
!
! #define AM7930_IREG_INIT 0x21
! #define AM7930_IREG_INIT2 0x20
! /* power mode selection */
! #define AM7930_INIT_PMS_IDLE 0x00
! #define AM7930_INIT_PMS_ACTIVE 0x01
! #define AM7930_INIT_PMS_ACTIVE_DATA 0x02
! #define AM7930_INIT_PMS_MASK 0x03
! /* interrupt selection */
! #define AM7930_INIT_INT_ENABLE 0x00
! #define AM7930_INIT_INT_DISABLE 0x04
! #define AM7930_INIT_INT_MASK 0x04
! /* clock divider selection */
! #define AM7930_INIT_CDS_DIV2 0x00
! #define AM7930_INIT_CDS_DIV1 0x08
! #define AM7930_INIT_CDS_DIV4 0x10
! #define AM7930_INIT_CDS_DIV3 0x20
! #define AM7930_INIT_CDS_MASK 0x38
! /* abort selection */
! #define AM7930_INIT_AS_RX 0x40
! #define AM7930_INIT_AS_NRX 0x00
! #define AM7930_INIT_AS_TX 0x80
! #define AM7930_INIT_AS_NTX 0x00
! #define AM7930_INIT_AS_MASK 0xc0
!
! /* Line Interface Unit registers */
!
! #define AM7930_IREG_LIU_LSR 0xa1 /* LIU status (ro) */
! #define AM7930_IREG_LIU_LPR 0xa2 /* LIU priority (rw) */
! #define AM7930_IREG_LIU_LMR1 0xa3 /* LIU mode register 1 (rw) */
! #define AM7930_IREG_LIU_LMR2 0xa4 /* LIU mode register 2 (rw) */
! #define AM7930_IREG_LIU_2_4 0xa5
! #define AM7930_IREG_LIU_MF 0xa6 /* Multiframe (rw) */
! #define AM7930_IREG_LIU_MFSB 0xa7 /* Multiframe S-bit/status (ro) */
! #define AM7930_IREG_LIU_MFQB 0xa8 /* Multiframe Q-bit buffer (wo) */
!
! /* Multiplexer registers */
!
! #define AM7930_IREG_MUX_MCR1 0x41 /* MUX command register 1 (rw) */
! #define AM7930_IREG_MUX_MCR2 0x42 /* MUX command register 2 (rw) */
! #define AM7930_IREG_MUX_MCR3 0x43 /* MUX command register 3 (rw) */
! #define AM7930_MCRCHAN_NC 0x00
! #define AM7930_MCRCHAN_B1 0x01
! #define AM7930_MCRCHAN_B2 0x02
! #define AM7930_MCRCHAN_BA 0x03
! #define AM7930_MCRCHAN_BB 0x04
! #define AM7930_MCRCHAN_BC 0x05
! #define AM7930_MCRCHAN_BD 0x06
! #define AM7930_MCRCHAN_BE 0x07
! #define AM7930_MCRCHAN_BF 0x08
! #define AM7930_IREG_MUX_MCR4 0x44 /* MUX command register 4 (rw) */
! #define AM7930_MCR4_INT_ENABLE (1 << 3)
! #define AM7930_MCR4_SWAPBB (1 << 4)
! #define AM7930_MCR4_SWAPBC (1 << 5)
! #define AM7930_IREG_MUX_1_4 0x45
!
! /* Main Audio Processor registers */
!
! #define AM7930_IREG_MAP_X 0x61 /* X filter coefficient (rw) */
! #define AM7930_IREG_MAP_R 0x62 /* R filter coefficient (rw) */
! #define AM7930_IREG_MAP_GX 0x63 /* GX gain coefficient (rw) */
! #define AM7930_IREG_MAP_GR 0x64 /* GR gain coefficient (rw) */
! #define AM7930_IREG_MAP_GER 0x65 /* GER gain coefficient (rw) */
! #define AM7930_IREG_MAP_STG 0x66 /* Sidetone gain coefficient (rw) */
! #define AM7930_IREG_MAP_FTGR 0x67 /* Frequency tone generator 1,2 (rw) */
! #define AM7930_IREG_MAP_ATGR 0x68 /* Amplitude tone generator 1,2 (rw) */
! #define AM7930_IREG_MAP_MMR1 0x69 /* MAP mode register 1 (rw) */
! #define AM7930_MMR1_ALAW 0x01
! #define AM7930_MMR1_GX 0x02
! #define AM7930_MMR1_GR 0x04
! #define AM7930_MMR1_GER 0x08
! #define AM7930_MMR1_X 0x10
! #define AM7930_MMR1_R 0x20
! #define AM7930_MMR1_STG 0x40
! #define AM7930_MMR1_LOOP 0x80
! #define AM7930_IREG_MAP_MMR2 0x6a /* MAP mode register 2 (rw) */
! #define AM7930_MMR2_AINB 0x01
! #define AM7930_MMR2_LS 0x02
! #define AM7930_MMR2_DTMF 0x04
! #define AM7930_MMR2_GEN 0x08
! #define AM7930_MMR2_RNG 0x10
! #define AM7930_MMR2_DIS_HPF 0x20
! #define AM7930_MMR2_DIS_AZ 0x40
! #define AM7930_IREG_MAP_1_10 0x6b
! #define AM7930_IREG_MAP_MMR3 0x6c /* MAP mode register 3 (rw) */
! #define AM7930_MMR3_BOTH 0x02
! #define AM7930_MMR3_MBZ 0x01
! #define AM7930_MMR3_GA 0x70
! #define AM7930_MMR3_GA0 0x00
! #define AM7930_MMR3_GA6 0x10
! #define AM7930_MMR3_GA12 0x20
! #define AM7930_MMR3_GA18 0x30
! #define AM7930_MMR3_GA24 0x40
! #define AM7930_MMR3_MUTE 0x08
! #define AM7930_MMR3_STR 0x01
! #define AM7930_IREG_MAP_STRA 0x6d /* Second tone ringer amplitude (rw) */
! #define AM7930_IREG_MAP_STRF 0x6e /* Second tone ringer frequency (rw) */
!
! /* Data Link Controller registers */
!
! #define AM7930_IREG_DLC_FRAR123 0x81 /* First rcvd byte address 123 (rw) */
! #define AM7930_IREG_DLC_SRAR123 0x82 /* Second rcvd byte address 123 (rw) */
! #define AM7930_IREG_DLC_TAR 0x83 /* Transmit address (rw) */
! #define AM7930_IREG_DLC_DRLR 0x84 /* D-channel receive byte limit (rw) */
! #define AM7930_IREG_DLC_DTCR 0x85 /* D-channel transmit byte count (rw)*/
! #define AM7930_IREG_DLC_DMR1 0x86 /* D-channel mode register 1 (rw) */
! #define AM7930_IREG_DLC_DMR2 0x87 /* D-channel mode register 2 (rw) */
! #define AM7930_IREG_DLC_1_7 0x88
! #define AM7930_IREG_DLC_DRCR 0x89 /* D-channel receive byte count (ro) */
! #define AM7930_IREG_DLC_RNGR1 0x8a /* Random number generator LSB (rw) */
! #define AM7930_IREG_DLC_RNGR2 0x8b /* Random number generator MSB (rw) */
! #define AM7930_IREG_DLC_FRAR4 0x8c /* First rcvd byte address 4 (rw) */
! #define AM7930_IREG_DLC_SRAR4 0x8d /* Second rcvd byte address 4 (rw) */
! #define AM7930_IREG_DLC_DMR3 0x8e /* D-channel mode register 3 (rw) */
! #define AM7930_IREG_DLC_DMR4 0x8f /* D-channel mode register 4 (rw) */
! #define AM7930_IREG_DLC_12_15 0x90
! #define AM7930_IREG_DLC_ASR 0x91 /* Address status register (ro) */
! #define AM7930_IREG_DLC_EFCR 0x92 /* Extended FIFO control (rw) */
!
! /* Peripheral Port registers */
!
! #define AM7930_IREG_PP_PPCR1 0xc0 /* Peripheral port control 1 (rw) */
! #define AM7930_PPCR1_DISABLE 0x00
! #define AM7930_PPCR1_SBP 0x01
! #define AM7930_PPCR1_IOM2SL 0x10
! #define AM7930_PPCR1_IOM2MA 0x11
! #define AM7930_IREG_PP_PPSR 0xc1 /* Peripheral port control 2 (ro) */
! #define AM7930_IREG_PP_PPIER 0xc2 /* Peripheral port intr enable (rw) */
! #define AM7930_IREG_PP_MTDR 0xc3 /* monitor transmit data (wo) */
! #define AM7930_IREG_PP_MRDR 0xc3 /* monitor receive data (ro) */
! #define AM7930_IREG_PP_CITDR0 0xc4 /* C/I transmit data register 0 (wo) */
! #define AM7930_IREG_PP_CIRDR0 0xc4 /* C/I receive data register 0 (ro) */
! #define AM7930_IREG_PP_CITDR1 0xc5 /* C/I transmit data register 1 (wo) */
! #define AM7930_IREG_PP_CIRDR1 0xc5 /* C/I receive data register 1 (ro) */
! #define AM7930_IREG_PP_PPCR2 0xc8 /* Peripheral port control 2 (rw) */
*** am7930var.h.orig Mon Mar 15 22:13:01 1999
--- am7930var.h Thu Jan 20 12:40:31 2000
***************
*** 1,161 ****
! /* $NetBSD: am7930var.h,v 1.6 1999/03/14 22:29:01 jonathan Exp $ */
!
! /*
! * Copyright (c) 1992, 1993
! * The Regents of the University of California. All rights reserved.
! *
! * This software was developed by the Computer Systems Engineering group
! * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
! * contributed to Berkeley.
! *
! * All advertising materials mentioning features or use of this software
! * must display the following acknowledgement:
! * This product includes software developed by the University of
! * California, Lawrence Berkeley Laboratory.
! *
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions
! * are met:
! * 1. Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * 2. Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! * 3. All advertising materials mentioning features or use of this software
! * must display the following acknowledgement:
! * This product includes software developed by the University of
! * California, Berkeley and its contributors.
! * 4. Neither the name of the University nor the names of its contributors
! * may be used to endorse or promote products derived from this software
! * without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
! * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
! * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
! * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
! * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
! * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
! * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
! * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
! * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
! * SUCH DAMAGE.
! *
! * @(#)bsd_audiovar.h 8.1 (Berkeley) 6/11/93
! */
!
! #ifndef _LOCORE
!
! /*
! * MI Software state, per AMD79C30 audio chip.
! */
! struct intrhand;
!
! /*
! * Chip interface
! */
! struct mapreg {
! u_short mr_x[8];
! u_short mr_r[8];
! u_short mr_gx;
! u_short mr_gr;
! u_short mr_ger;
! u_short mr_stgr;
! u_short mr_ftgr;
! u_short mr_atgr;
! u_char mr_mmr1;
! u_char mr_mmr2;
! };
!
! /*
! * pdma state
! */
! struct auio {
! bus_space_tag_t au_bt; /* bus tag */
! bus_space_handle_t au_bh; /* handle to chip registers */
!
! u_char *au_rdata; /* record data */
! u_char *au_rend; /* end of record data */
! u_char *au_pdata; /* play data */
! u_char *au_pend; /* end of play data */
! struct evcnt au_intrcnt; /* statistics */
! };
! /*
! * interrupt-hanlder status
! * XXX should be MI or required in each port's <machine/cpu.h>
! */
! struct am7930_intrhand {
! int (*ih_fun) __P((void *));
! void *ih_arg;
};
struct am7930_softc {
struct device sc_dev; /* base device */
- bus_space_tag_t sc_bustag; /* bus cookie */
- bus_space_handle_t sc_bh; /* device registers */
int sc_open; /* single use device */
int sc_locked; /* true when transfering data */
- struct mapreg sc_map; /* current contents of map registers */
! u_char sc_rlevel; /* record level */
! u_char sc_plevel; /* play level */
! u_char sc_mlevel; /* monitor level */
! u_char sc_out_port; /* output port */
!
!
! /* Callbacks */
! void (*sc_wam16) __P((bus_space_tag_t bt, bus_space_handle_t bh,
! u_int16_t val));
! #define WAMD16(bt, bh, v) (sc)->sc_wam16((bt), (bh), (v))
! void (*sc_onopen) __P((struct am7930_softc *sc));
! void (*sc_onclose) __P((struct am7930_softc *sc));
!
!
! /*
! * interface to the sparc MD interrupt handlers.
! * XXX should really either be in MD sparc derived softc struct,
! * or replaced with an MI pdma type.
! */
!
! struct am7930_intrhand sc_ih; /* interrupt vector (hw or sw) */
! void (*sc_rintr)(void*); /* input completion intr handler */
! void *sc_rarg; /* arg for sc_rintr() */
! void (*sc_pintr)(void*); /* output completion intr handler */
! void *sc_parg; /* arg for sc_pintr() */
!
! /* sc_au is special in that the hardware interrupt handler uses it */
! struct auio sc_au; /* recv and xmit buffers, etc */
! #define sc_intrcnt sc_au.au_intrcnt /* statistics */
};
extern int am7930debug;
! /* Write 16 bits of data from variable v to the data port of the audio chip */
/*
! * Sun-specific audio channel definitions.
*/
! #define SUNAUDIO_MIC_PORT 0
! #define SUNAUDIO_SPEAKER 1
! #define SUNAUDIO_HEADPHONES 2
! #define SUNAUDIO_MONITOR 3
! #define SUNAUDIO_SOURCE 4
! #define SUNAUDIO_OUTPUT 5
! #define SUNAUDIO_INPUT_CLASS 6
! #define SUNAUDIO_OUTPUT_CLASS 7
! #define SUNAUDIO_RECORD_CLASS 8
! #define SUNAUDIO_MONITOR_CLASS 9
! /* declarations */
! void am7930_init __P((struct am7930_softc *));
/*
* audio(9) MI callbacks from upper-level audio layer.
*/
struct audio_device;
struct audio_encoding;
struct audio_params;
--- 1,69 ----
! /* $NetBSD$ */
+ struct am7930_softc;
! struct am7930_glue {
! u_int8_t (*codec_iread) __P((struct am7930_softc *sc, int));
! void (*codec_iwrite) __P((struct am7930_softc *sc, int, u_int8_t));
! u_int16_t (*codec_iread16) __P((struct am7930_softc *sc, int));
! void (*codec_iwrite16) __P((struct am7930_softc *sc, int, u_int16_t));
! void (*onopen) __P((struct am7930_softc *sc));
! void (*onclose) __P((struct am7930_softc *sc));
! int factor;
! void (*input_conv) __P((void *, u_int8_t *, int));
! void (*output_conv) __P((void *, u_int8_t *, int));
};
struct am7930_softc {
struct device sc_dev; /* base device */
int sc_open; /* single use device */
int sc_locked; /* true when transfering data */
! u_int8_t sc_rlevel; /* record level */
! u_int8_t sc_plevel; /* play level */
! u_int8_t sc_mlevel; /* monitor level */
! u_int8_t sc_out_port; /* output port */
! u_int8_t sc_mic_mute;
!
! struct am7930_glue *sc_glue;
};
extern int am7930debug;
!
! void am7930_init __P((struct am7930_softc *, int));
!
! #define AM7930_IWRITE(x,y,z) (*(x)->sc_glue->codec_iwrite)((x),(y),(z))
! #define AM7930_IREAD(x,y) (*(x)->sc_glue->codec_iread)((x),(y))
! #define AM7930_IWRITE16(x,y,z) (*(x)->sc_glue->codec_iwrite16)((x),(y),(z))
! #define AM7930_IREAD16(x,y) (*(x)->sc_glue->codec_iread16)((x),(y))
!
! #define AUDIOAMD_POLL_MODE 0
! #define AUDIOAMD_DMA_MODE 1
/*
! * audio channel definitions.
*/
! #define AUDIOAMD_SPEAKER_VOL 0 /* speaker volume */
! #define AUDIOAMD_HEADPHONES_VOL 1 /* headphones volume */
! #define AUDIOAMD_OUTPUT_CLASS 2
+ #define AUDIOAMD_MONITOR_VOL 3 /* monitor input volume */
+ #define AUDIOAMD_MONITOR_OUTPUT 4 /* output selector */
+ #define AUDIOAMD_MONITOR_CLASS 5
! #define AUDIOAMD_MIC_VOL 6 /* microphone volume */
! #define AUDIOAMD_MIC_MUTE 7
! #define AUDIOAMD_INPUT_CLASS 8
!
! #define AUDIOAMD_RECORD_SOURCE 9 /* source selector */
! #define AUDIOAMD_RECORD_CLASS 10
/*
* audio(9) MI callbacks from upper-level audio layer.
*/
+
struct audio_device;
struct audio_encoding;
struct audio_params;
***************
*** 163,174 ****
int am7930_open __P((void *, int));
void am7930_close __P((void *));
int am7930_query_encoding __P((void *, struct audio_encoding *));
! int am7930_set_params __P((void *, int, int, struct audio_params *, struct audio_params *));
int am7930_commit_settings __P((void *));
int am7930_round_blocksize __P((void *, int));
int am7930_halt_output __P((void *));
int am7930_halt_input __P((void *));
int am7930_getdev __P((void *, struct audio_device *));
int am7930_get_props __P((void *));
!
! #endif /* !_LOCORE */
--- 71,84 ----
int am7930_open __P((void *, int));
void am7930_close __P((void *));
int am7930_query_encoding __P((void *, struct audio_encoding *));
! int am7930_set_params __P((void *, int, int, struct audio_params *,
! struct audio_params *));
int am7930_commit_settings __P((void *));
int am7930_round_blocksize __P((void *, int));
int am7930_halt_output __P((void *));
int am7930_halt_input __P((void *));
int am7930_getdev __P((void *, struct audio_device *));
int am7930_get_props __P((void *));
! int am7930_set_port __P((void *, mixer_ctrl_t *));
! int am7930_get_port __P((void *, mixer_ctrl_t *));
! int am7930_query_devinfo __P((void *, mixer_devinfo_t *));
*** files.orig Thu Jan 20 12:30:27 2000
--- files Thu Jan 20 12:33:17 2000
***************
*** 378,385 ****
file dev/ic/ad1848.c ad1848
# AMD 7930 audio/ISDN codec
! device audioamd: audio
! file dev/ic/am7930.c audioamd
# SPARC `SUNW,audiocs'
device audiocs: audio, auconv, ad1848
--- 378,385 ----
file dev/ic/ad1848.c ad1848
# AMD 7930 audio/ISDN codec
! define am7930
! file dev/ic/am7930.c am7930
# SPARC `SUNW,audiocs'
device audiocs: audio, auconv, ad1848
>Release-Note:
>Audit-Trail:
>Unformatted: