>Number:         7565
>Category:       bin
>Synopsis:       gdb/arm netbsd specific files out of sync
>Confidential:   no
>Severity:       serious
>Priority:       medium
>Responsible:    bin-bug-people (Utility Bug People)
>State:          open
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Wed May 12 11:05:01 1999
>Last-Modified:
>Originator:     rearnsha
>Organization:
ARM
-- 
>Release:        NetBSD 1.4 (arm32)<NetBSD-current source date>
>Environment:
	
System: NetBSD shark1 1.4 NetBSD 1.4 (SHARK) #35: Fri May 7 18:01:03 BST 1999 rearnsha@shark1:/usr/src/sys/arch/arm32/compile/SHARK arm32


>Description:
	In the recent import of gdb some of the arm-specific files were
	changed, but the changes haven't been fully propagated to the 
	NetBSD variants of these files.  One such change is the definition
	of INST_{cond} for the condition code parts of the instruction set;
	these used to be the condition field as stored at the top of the
	instruction, but are now the condition field shifted down to the
	bottom of the instruction.
>How-To-Repeat:
	
	Try to use gdb to single step over a conditional branch instruction,
	gdb gets all confused and either follows the branch when it shouldn't
	or doesn't follow the branch when it should.  The net result is that
	the breakpoint is put in the wrong place and the debugger fails to 
	stop.
>Fix:
	Patch below.

Index: tm-armnbsd.h
===================================================================
RCS file: /home/rearnsha/netbsd/cvs/src/gnu/dist/gdb/config/arm/tm-armnbsd.h,v
retrieving revision 1.1.1.3
diff -p -r1.1.1.3 tm-armnbsd.h
*** tm-armnbsd.h	1999/03/26 20:30:00	1.1.1.3
--- tm-armnbsd.h	1999/05/12 17:26:54
*************** unsigned char * arm_breakpoint_from_pc P
*** 201,222 ****
  #define ARM_LAST_FP_ARG_REGNUM	F3_REGNUM
  
  /* Instruction condition field values.  */
! #define INST_EQ		0x00000000
! #define INST_NE		0x10000000
! #define INST_CS		0x20000000
! #define INST_CC		0x30000000
! #define INST_MI		0x40000000
! #define INST_PL		0x50000000
! #define INST_VS		0x60000000
! #define INST_VC		0x70000000
! #define INST_HI		0x80000000
! #define INST_LS		0x90000000
! #define INST_GE		0xa0000000
! #define INST_LT		0xb0000000
! #define INST_GT		0xc0000000
! #define INST_LE		0xd0000000
! #define INST_AL		0xe0000000
! #define INST_NV		0xf0000000
  
  #define FLAG_N		0x80000000
  #define FLAG_Z		0x40000000
--- 201,222 ----
  #define ARM_LAST_FP_ARG_REGNUM	F3_REGNUM
  
  /* Instruction condition field values.  */
! #define INST_EQ		0x0
! #define INST_NE		0x1
! #define INST_CS		0x2
! #define INST_CC		0x3
! #define INST_MI		0x4
! #define INST_PL		0x5
! #define INST_VS		0x6
! #define INST_VC		0x7
! #define INST_HI		0x8
! #define INST_LS		0x9
! #define INST_GE		0xa
! #define INST_LT		0xb
! #define INST_GT		0xc
! #define INST_LE		0xd
! #define INST_AL		0xe
! #define INST_NV		0xf
  
  #define FLAG_N		0x80000000
  #define FLAG_Z		0x40000000

>Audit-Trail:
>Unformatted: