Re: patches for RDC pcidevs, rdcpcib driver and Vortex86 SoCs identification

[Andrius V <vezhlys%gmail.com@localhost>]

Basically all SoCs has the same pattern: "0x3[0]504d44" where 0
changes from 1 to 8 as of now. Previously code had a switch statement
just comparing values directly, but current optimization with the
"array" utilized the fact that ids were up to number "7". Because of
this, just adding EX2 to array won't work anymore with current
comparisons. So I came up with upper solution just to pass through all
possible 3x (0-f) values, extract the number, and finally check that
it doesn't exceed the size of array (otherwise still pass 0). Or at
least, that was my idea.

SX     0x31504d44         31
DX     0x32504d44         32
MX     0x33504d44         33
DX2    0x34504d44         34
MX+   0x35504d44         35
DX3    0x36504d44          36
EX      0x37504d44          37
EX2    0x38504d44         38

Regards,
Andrius V

    }

On Tue, Apr 7, 2020 at 3:46 PM Christos Zoulas <christos%astron.com@localhost> wrote:
>
> In article <CAFO4Nko3FmosmhxqNNNP69-hMLDXKrWVSXc6nAHyeTjBZWKCKw%mail.gmail.com@localhost>,
> Andrius V  <vezhlys%gmail.com@localhost> wrote:
> >There's a mistake in rdcpicb.c patch. Last ID duplicated, should be {
> >PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R6036_PCIB}.
> >
>
> Thanks, I committed the first two, but not the one below because I am not
> sure if the change in the mask is correct. Where are the bit values
> documented?
>
> Best,
>
> christos
>
> >> CPU identification:
> >>
> >> diff --git a/sys/arch/x86/x86/identcpu.c b/sys/arch/x86/x86/identcpu.c
> >> index 80f7e403a37..5c52635825f 100644
> >> --- a/sys/arch/x86/x86/identcpu.c
> >> +++ b/sys/arch/x86/x86/identcpu.c
> >> @@ -704,7 +704,7 @@ cpu_probe_vortex86(struct cpu_info *ci)
> >>  #define PCI_MODE1_DATA_REG     0x0cfc
> >>  #define PCI_MODE1_ENABLE       0x80000000UL
> >>
> >> -       uint32_t reg;
> >> +       uint32_t reg, idx;
> >>
> >>         if (cpu_vendor != CPUVENDOR_VORTEX86)
> >>                 return;
> >> @@ -718,17 +718,18 @@ cpu_probe_vortex86(struct cpu_info *ci)
> >>         outl(PCI_MODE1_ADDRESS_REG, PCI_MODE1_ENABLE | 0x90);
> >>         reg = inl(PCI_MODE1_DATA_REG);
> >>
> >> -       if ((reg & 0xf8ffffff) != 0x30504d44) {
> >> -               reg = 0;
> >> +       if ((reg & 0xf0ffffff) != 0x30504d44) {
> >> +               idx = 0;
> >>         } else {
> >> -               reg = (reg >> 24) & 7;
> >> +               idx = (reg >> 24) & 0x0f;
> >>         }
> >>
> >>         static const char *cpu_vortex86_flavor[] = {
> >> -           "??", "SX", "DX", "MX", "DX2", "MX+", "DX3", "EX",
> >> +           "??", "SX", "DX", "MX", "DX2", "MX+", "DX3", "EX", "EX2"
> >>         };
> >> +       idx = sizeof(cpu_vortex86_flavor) > idx ? idx : 0;
> >>         snprintf(cpu_brand_string, sizeof(cpu_brand_string), "Vortex86%s",
> >> -           cpu_vortex86_flavor[reg]);
> >> +           cpu_vortex86_flavor[idx]);
> >>
> >>  #undef PCI_MODE1_ENABLE
> >>  #undef PCI_MODE1_ADDRESS_REG
> >
>
>
>