On 27.12.2017 20:15, Christos Zoulas wrote: > On Dec 27, 7:53pm, martin%duskware.de@localhost (Martin Husemann) wrote: > | I must be missing something, or the test works on alpha and x86 due to a > | bug, but correctly fails on other architectures. > > I agree with the assessment. > > christos > This is not a x86 bug. It's an idiom in x86 to: - write software breakpoint - execute instruction (& move EIP/RIP) - detect trap - report to debugger - rewind IP - write original code - [offer prompt to a user; interaction; etc] - option to resume from the retrieved instruction There is a different behavior with hardware assisted (debug registers) instruction trap. As we trap before the execution of an instruction and there is no need to rewind the IP. In general these specific nits are to be handled in a debugger. Of course, we can try to streamline the behavior in all ports to behave exactly the same way. The SPARC behavior is certainly mild from a debugger point of view.
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