SolidRun Cubox

[KIYOHARA Takashi <kiyohara%kk.iij4u.or.jp@localhost>]

Hi!

SolidRun Cubox (SoC is Marvell Dove 88AP510. a.k.a. Armada 510) boots!

However, this support has a problem now.
The cpu type of 88AP510 is PJ4.  Not CPU_PJ4B.  But core is Sheeva 88SV581x.
This mean is confusing in set_cpufuncs().

Also sdhc@mvsoc supports PIO-read only now.

ToDo:
sdhc@mvsoc PIO-write and DMA(gtidmac?) support.
Thermal Manager and DFS.

Thanks,
--
kiyohara

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NetBSD 7.99.39 (CUBOX) #0: Sat Nov  5 14:33:50 UTC 2016
	ax@ubuntu:/mnt/NetBSD/src/sys/arch/evbarm/compile/CUBOX
total memory = 2048 MB
avail memory = 2022 MB
sysctl_createv: sysctl_create(machine_arch) returned 17
timecounter: Timecounters tick every 10.000 msec
Kernelized RAIDframe activated
mainbus0 (root)
cpu0 at mainbus0 core 0: Sheeva 88SV581x rev 5 (Marvell V core)
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu0: 32KB/32B 4-way L1 PIPT Instruction cache
cpu0: 32KB/32B 8-way write-back-locking-C L1 VIPT Data cache
cpu0: 512KB/32B 8-way write-through L2 PIPT Unified cache
cpu0: This kernel does not fully support this CPU.
cpu0: Recompile with "options CPU_PJ4B" to correct this.
vfp0 at cpu0: VFP3, rounding, exceptions, NaN propagation
mvsoc0 at mainbus0: Marvell 88AP510 Rev. A1  Dove
mvsoc0: CPU Clock 800.000 MHz  SysClock 400.000 MHz  TClock 166.000 MHz
mvsoctmr0 at mvsoc0 unit 0 offset 0x20300-0x203ff irq 65: Marvell SoC Timer
com0 at mvsoc0 unit 0 offset 0x12000-0x1201f irq 7: ns16550a, working fifo
com0: console
com1 at mvsoc0 unit 1 offset 0x12100-0x1211f irq 8: ns16550a, working fifo
com2 at mvsoc0 unit 2 offset 0x12200-0x1221f irq 9: ns16550a, working fifo
com3 at mvsoc0 unit 3 offset 0x12300-0x1231f irq 10: ns16550a, working fifo
gttwsi0 at mvsoc0 unit 0 offset 0x11000-0x110ff irq 11: Marvell TWSI controller
iic0 at gttwsi0: I2C bus
mvspi0 at mvsoc0 unit 0 offset 0x10600-0x1067f irq 6: Marvell SPI controller
spi0 at mvspi0: SPI bus
m25p0 at spi0 slave 0
spiflash0 at m25p0: Numonyx N25Q128 SPI flash
spiflash0: 16384 KB, 256 sectors of 64 KB each
mvspi1 at mvsoc0 unit 1 offset 0x14600-0x1467f irq 5: Marvell SPI controller
spi1 at mvspi1: SPI bus
mvcesa0 at mvsoc0 unit 0 offset 0x3d000-0x3dfff irq 31: Marvell Cryptographic Engines and Security Accelerator
ehci0 at mvsoc0 unit 0 offset 0x50000-0x50fff irq 24: Marvell USB 2.0 Interface
ehci0: EHCI version 1.0
usb0 at ehci0: USB revision 2.0
ehci1 at mvsoc0 unit 1 offset 0x51000-0x51fff irq 25: Marvell USB 2.0 Interface
ehci1: EHCI version 1.0
usb1 at ehci1: USB revision 2.0
mvgbec0 at mvsoc0 unit 0 offset 0x70000-0x73fff: Marvell Gigabit Ethernet Controller
mvgbe0 at mvgbec0 port 0 irq 29
mvgbe0: Ethernet address d0:63:b4:00:17:01
makphy0 at mvgbe0 phy 1: Marvell 88E1116R Gigabit PHY, rev. 0
makphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto
mvpex0 at mvsoc0 unit 0 offset 0x40000-0x41fff irq 16: Marvell PCI Express Interface
pci0 at mvpex0
pci0: i/o space, memory space enabled
vendor 11ab product 0510 (miscellaneous memory, revision 0x07) at pci0 dev 0 function 0 not configured
mvpex1 at mvsoc0 unit 1 offset 0x80000-0x81fff irq 18: Marvell PCI Express Interface
pci1 at mvpex1
pci1: i/o space, memory space enabled
vendor 11ab product 0510 (miscellaneous memory, revision 0x07) at pci1 dev 0 function 0 not configured
sdhc0 at mvsoc0 unit 0 offset 0x92000-0x93fff irq 35: SDHC controller
sdhc0: PRE-SDHC, PIO, 50000 kHz, HS 3.0V 3.3V, 512 byte blocks
sdmmc0 at sdhc0 slot 0
sdhc1 at mvsoc0 unit 1 offset 0x90000-0x91fff irq 36: SDHC controller
sdhc1: PRE-SDHC, PIO, 50000 kHz, HS 3.0V 3.3V, 512 byte blocks
sdmmc1 at sdhc1 slot 0
mvsata0 at mvsoc0 unit 0 offset 0xa0000-0xa7fff irq 62: Marvell Serial-ATA Host Controller (SATAHC)
mvsata0: GenIIe, 1hc, 1port/hc
atabus0 at mvsata0 channel 0
mvsocts0 at mvsoc0 unit 0 offset 0xd001c-0xd0027 irq 33: Marvell SoC Thermal Sensor
mvsocts_intr
  val 0x1c6
  tempout 62499000 uc(0x3b9a8b8), ct 228163000, oht 228163000
  Cooling
  CoolingDelay: 0x700
  OverHeatDelay: 0x700
mvsocrtc0 at mvsoc0 unit 0 offset 0xd8500-0xd8517: Marvell SoC Real Time Clock
timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
timecounter: Timecounter "mvsoctmr0" frequency 166000000 Hz quality 100
uhub0 at usb0: Marvell EHCI root hub, class 9/0, rev 2.00/1.00, addr 1
uhub0: 1 port with 1 removable, self powered
uhub1 at usb1: Marvell EHCI root hub, class 9/0, rev 2.00/1.00, addr 1
uhub1: 1 port with 1 removable, self powered
sdmmc1: sdmmc_mem_enable failed with error 60
sdmmc1: couldn't enable card: 60
IPsec: Initialized Security Association Processing.
ld0 at sdmmc0: <0x03:0x5344:SU08G:0x80:0x71730373:0x0bb>
ld0: 7580 MB, 3850 cyl, 64 head, 63 sec, 512 bytes/sect x 15523840 sectors
ld0: 4-bit width, High-Speed/SDR25, 50.000 MHz
umass0 at uhub0 port 1 configuration 1 interface 0
umass0: Sony Storage Media, rev 2.00/1.00, addr 2
umass0: using SCSI over Bulk-Only
scsibus0 at umass0: 2 targets, 1 lun per target
sd0 at scsibus0 target 0 lun 0: <Sony, Storage Media, 0100> disk removable
sd0: 991 MB, 1968 cyl, 16 head, 63 sec, 512 bytes/sect x 2030592 sectors
WARNING: 2 errors while detecting hardware; check system log.
boot device: <unknown>
root device: ld0
dump device (default ld0b): 
file system (default generic): 
root on ld0a dumps on ld0b
root file system type: ffs
kern.module.path=/stand/evbarm/7.99.39/modules
init path (default /sbin/init): 
init: trying /sbin/init