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Re: USB troubles with SB600/SB700 chipsets
Quentin Garnier wrote:
> On Sun, May 17, 2009 at 11:40:22PM +0200, Christoph Egger wrote:
>> a new version of this patch. It mainly avoids a lot of code duplication.
>> The orders how test it still apply.
> There's no point of having a specific device for that, even more if
> saves no text bloat. I understand why it might have been easier to
> develop and test; I'm just saying it should not end up being committed
> as this patch.
> Otherwise it seems to be the way to go. Two comments though: for the
> SB700 detection, is it an exact discrete list of revisions, or is the
> intent more like "revision >= 3a"?
The SB700 and SB800 chipsets can be distinguished by checking the
PCI revision of the SMBus controller.
The impacted SB700 revisions have the SMBus revisions 0x3a and 0x3b.
Later revisions don't have the hw bug.
> And if you have a reference to a specific erratum it'd be better to add
> it as a comment somewhere.
AMD doesn't publish erratas for chipsets as it does for CPUs.
IMO, AMD should do.
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