Re: siop(4) problem on bebox

[KIYOHARA Takashi <kiyohara%kk.iij4u.or.jp@localhost>]

Hi! Manuel,


From: Manuel Bouyer <bouyer%antioche.eu.org@localhost>
Date: Thu, 5 Jun 2008 17:06:19 +0200

> On Thu, Jun 05, 2008 at 03:00:15AM +0900, KIYOHARA Takashi wrote:

> > Our bebox have internal SCSI (siop).  I noticed there were two problems
> > in siop on bebox.
> > 
> > First, the interrupt of siop is established before the initialization of
> > softc.  However parity error had already happened in my bebox when boot
> > time.  Therefore, because initialization is not done, the following
> > messages are seen though siop_intr() is called.
> > 
> >     :
> >   pci0 at mainbus0 bus 0: indirect configuration space access
> >   pchb0 at pci0 dev 0 function 0
> >   pchb0: Motorola MPC105 "Eagle" Host Bridge (rev. 0x24)
> >   pchb0: L2 cache: 256K, multiprocessor mode
> >   pcib0 at pci0 dev 11 function 0: Intel 82378ZB System I/O (rev. 0x43)
> >   siop0 at pci0 dev 12 function 0: Symbios Logic 53c810 (fast scsi)
> >   siop0:parity error
> >   siop0: scsi bus reset
> >   DMA IRQ: Illegal instruction DMA fifo empty, DSP=0x1e8 DSA=0x8480d05c: 
> > siop0: current DSA invalid
> >   siop0: scsi bus reset
> >   DMA IRQ: Illegal instruction DMA fifo empty, DSP=0x1e8 DSA=0x8480d05c: 
> > siop0: current DSA invalid
> >     :
> >     :
> > 
> > # I will confirm the jumper of SCSI HDD for parity is enabled.
> > But I think this initialization have problem.  Please masking interrupt
> > or initializing the softc before established interrupt routine.
> 
> At this point in autoconf, the kernel should be running at splhigh(),
> or eventually with interrupts disabled at all. So the interrupt handler
> should not be called there. It's probably an issue with port-bebox if
> siop_intr() is called at this point of autoconf.

It agrees to your opinion.
The mistake was exactly found in bebox.  (Fixed ;-)


> > Next, internal SCSI of bebox uses the clock of PCI.  There is SCLK in
> > STEST1 (SCSI Test One:0x4d) of 53c810.
> > 
> > How do we tell SCLK=1 to internal SCSI?
> > (For instance, device_properties()?)
> 
> device_properties() would be appropriate. But this case isn't handled by siop
> yet, you'll have to add it to siop_common.c:siop_common_reset()
> (along with the appropriate flag for sc->features). the PCI front-end
> would read the device_properties() and set the flag when needed.

This patch attaches to this mail.
Any comments ?

Thanks,
--
kiyohara

Index: ic/siop_common.c
===================================================================
RCS file: /cvsroot/src/sys/dev/ic/siop_common.c,v
retrieving revision 1.45
diff -u -r1.45 siop_common.c
--- ic/siop_common.c    8 Apr 2008 12:07:27 -0000       1.45
+++ ic/siop_common.c    7 Jun 2008 02:32:10 -0000
@@ -165,7 +165,7 @@
 siop_common_reset(sc)
        struct siop_common_softc *sc;
 {
-       u_int32_t stest3;
+       u_int32_t stest1, stest3;
 
        /* reset the chip */
        bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_SRST);
@@ -220,6 +220,13 @@
        } else {
                bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1, 0);
        }
+
+       if (sc->features & SF_CHIP_USEPCIC) {
+               stest1 = bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_STEST1);
+               stest1 |= STEST1_SCLK;
+               bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1, stest1);
+       }
+
        if (sc->features & SF_CHIP_FIFO)
                bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5,
                    bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5) |
Index: ic/siopreg.h
===================================================================
RCS file: /cvsroot/src/sys/dev/ic/siopreg.h,v
retrieving revision 1.19
diff -u -r1.19 siopreg.h
--- ic/siopreg.h        27 Mar 2008 10:06:31 -0000      1.19
+++ ic/siopreg.h        7 Jun 2008 02:32:10 -0000
@@ -346,6 +346,7 @@
 #define STEST1_DIGE    0x10    /* 1010 only */
 #define STEST1_DBLEN   0x08    /* 875-only */
 #define STEST1_DBLSEL  0x04    /* 875-only */
+#define STEST1_SCLK    0x80
 
 #define SIOP_STEST2    0x4E /* SCSI test 2, RO, R/W on 875 */
 #define STEST2_DIF     0x20    /* 875 only */
Index: ic/siopvar_common.h
===================================================================
RCS file: /cvsroot/src/sys/dev/ic/siopvar_common.h,v
retrieving revision 1.35
diff -u -r1.35 siopvar_common.h
--- ic/siopvar_common.h 27 Mar 2008 10:06:31 -0000      1.35
+++ ic/siopvar_common.h 7 Jun 2008 02:32:10 -0000
@@ -177,6 +177,7 @@
 #define SF_CHIP_GEBUG  0x00080000 /* SCSI gross error bug */
 #define SF_CHIP_AAIP   0x00100000 /* Always generate AIP regardless of SNCTL4*/
 #define SF_CHIP_BE     0x00200000 /* big-endian */
+#define SF_CHIP_USEPCIC        0x00400000 /* use PCI clock */
 
 #define SF_PCI_RL      0x01000000 /* PCI read line */
 #define SF_PCI_RM      0x02000000 /* PCI read multiple */
Index: pci/siop_pci_common.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/siop_pci_common.c,v
retrieving revision 1.27
diff -u -r1.27 siop_pci_common.c
--- pci/siop_pci_common.c       10 Apr 2008 19:13:38 -0000      1.27
+++ pci/siop_pci_common.c       7 Jun 2008 02:32:11 -0000
@@ -242,8 +242,10 @@
        bus_space_tag_t iot, memt;
        bus_space_handle_t ioh, memh;
        pcireg_t memtype;
+       prop_dictionary_t dict;
        int memh_valid, ioh_valid;
        bus_addr_t ioaddr, memaddr;
+       bool use_pciclock;
 
        aprint_naive(": SCSI controller\n");
 
@@ -258,6 +260,10 @@
 #ifdef SIOP_SYMLED    /* XXX Should be a devprop! */
        siop_sc->features |= SF_CHIP_LED0;
 #endif
+       dict = device_properties(&siop_sc->sc_dev);
+       if (prop_dictionary_get_bool(dict, "use_pciclock", &use_pciclock))
+               if (use_pciclock)
+                       siop_sc->features |= SF_CHIP_USEPCIC;
        siop_sc->maxburst = pci_sc->sc_pp->maxburst;
        siop_sc->maxoff = pci_sc->sc_pp->maxoff;
        siop_sc->clock_div = pci_sc->sc_pp->clock_div;