Subject: Re: spdmem works for a nForce 3 chipset
To: None <current-users@NetBSD.org>
From: Paul Goyette <paul@whooppee.com>
List: current-users
Date: 08/18/2007 08:01:56
On Sat, 18 Aug 2007, Bernd Ernesti wrote:

> Cool and it works with a nfsmbc:
>
> nfsmbc0 at pci0 dev 1 function 1: NVIDIA nForce3 250 SMBus Controller (rev. 0xa1)
> nfsmb0 at nfsmbc0 SMBus 1
> iic0 at nfsmb0: I2C bus
> spdmem0 at iic0 addr 0x52
> spdmem0: DDR SDRAM memory, no parity or ECC, 1024MB, 400MHz, PC3200
> spdmem0: 13 rows, 11 cols, 2 ranks, 4 banks/chip, 5.0ns cycle time
> spdmem0: voltage SSTL 2.5V, refresh time 7.8us (self-refreshing)
> spdmem1 at iic0 addr 0x53
> spdmem1: DDR SDRAM memory, no parity or ECC, 1024MB, 400MHz, PC3200
> spdmem1: 13 rows, 11 cols, 2 ranks, 4 banks/chip, 5.0ns cycle time
> spdmem1: voltage SSTL 2.5V, refresh time 7.8us (self-refreshing)

Kewl!  Glad to see someone else benefitting!

> Would it be possible to not use fixed addresses and enable spdmem
> by default?
> I thought that there was some code to scan an iic, but maybe that
> was just the spdmem code to get the spd informations.

Well, I have some code (from Nicolas Joly) that will enumerate the 
existence of devices on the SMBus, but so far nothing that will actually 
identify the type of devices.  According to the folks at JEDEC, they 
won't even publish an official list of I2C device address assignments, 
claiming that that would lead to having vendors "staking claims" on the 
unassigned values.  (This fear might well be warranted;  in my day job 
I've actually been bitten by similar issues and had to retract a major 
software release from distribution.)

So for now, the addr attribute needs to be explicitly specified in the 
config for all I2C devices.


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