Subject: Re: NVIDIA nForce2/3/4 SMBus controller
To: Paul Goyette <paul@whooppee.com>
From: Nicolas Joly <njoly@pasteur.fr>
List: current-users
Date: 07/05/2007 14:33:07
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On Sat, Jun 30, 2007 at 04:06:00PM -0700, Paul Goyette wrote:
>
> It successfully probes the devices. I'm not sure if it does anything
> useful, since I don't have anything to actually access the I2C bus...
You should see the memory modules, using the small (attached) driver
`spdmem' i wrote when i was trying to add support for some SMBus
controllers.
It simply tries to detect memory modules using `Serial Presence
Detect' (SPD) datas found on modules eeproms (i2c addr 0x50,0x51,...).
The first memory module (this machine has 32GB (16 x 2GB) of RAM)
seems to be correctly detected :
nfsmbc0 at pci0 dev 1 function 1: NVIDIA nForce4 SMBus (rev. 0xa2)
nfsmb0 at nfsmbc0 SMBus 1
iic0 at nfsmb0: I2C bus
spdmem0 at iic0 addr 0x50: DDR2 SDRAM memory module
nfsmb1 at nfsmbc0 SMBus 2
iic1 at nfsmb1: I2C bus
--
Nicolas Joly
Biological Software and Databanks.
Institut Pasteur, Paris.
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Index: sys/dev/i2c/files.i2c
===================================================================
RCS file: /cvsroot/src/sys/dev/i2c/files.i2c,v
retrieving revision 1.14
diff -u -r1.14 files.i2c
--- sys/dev/i2c/files.i2c 17 Jan 2007 23:33:23 -0000 1.14
+++ sys/dev/i2c/files.i2c 5 Jul 2007 12:00:22 -0000
@@ -43,6 +43,11 @@
file dev/i2c/at24cxx.c seeprom | at24cxx_eeprom
needs-flag
+# Memory Serial Presence Detect
+device spdmem
+attach spdmem at iic
+file dev/i2c/spdmem.c spdmem
+
# National Semiconductor LM75 temperature sensor
device lmtemp: sysmon_envsys
attach lmtemp at iic
Index: sys/dev/i2c/spdmem.c
===================================================================
RCS file: sys/dev/i2c/spdmem.c
diff -N sys/dev/i2c/spdmem.c
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ sys/dev/i2c/spdmem.c 5 Jul 2007 12:00:22 -0000
@@ -0,0 +1,129 @@
+/* $NetBSD$ */
+
+/*
+ * Copyright (c) 2007 Nicolas Joly
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD$");
+
+#include <sys/param.h>
+#include <sys/device.h>
+
+#include <dev/i2c/i2cvar.h>
+
+#define SPDMEM_MEMTYPE 0x02
+#define SPDMEM_MEMTYPE_EDO 0x02
+#define SPDMEM_MEMTYPE_SDRAM 0x04
+#define SPDMEM_MEMTYPE_DDRSDRAM 0x07
+#define SPDMEM_MEMTYPE_DDR2SDRAM 0x08
+
+struct spdmem_softc {
+ struct device sc_dev;
+
+ i2c_tag_t sc_tag;
+ i2c_addr_t sc_addr;
+};
+
+static int spdmem_match(struct device *, struct cfdata *, void *);
+static void spdmem_attach(struct device *, struct device *, void *);
+
+static uint8_t spdmem_read(struct spdmem_softc *, uint8_t);
+
+CFATTACH_DECL(spdmem, sizeof(struct spdmem_softc),
+ spdmem_match, spdmem_attach, NULL, NULL);
+
+static int
+spdmem_match(struct device *parent, struct cfdata *match, void *aux)
+{
+ struct i2c_attach_args *ia = aux;
+ struct spdmem_softc sc;
+ int cksum = 0;
+ uint8_t i, val;
+
+ if (ia->ia_addr < 0x50)
+ return 0;
+
+ sc.sc_tag = ia->ia_tag;
+ sc.sc_addr = ia->ia_addr;
+
+ for (i = 0; i < 63; i++)
+ cksum += spdmem_read(&sc, i);
+ val = spdmem_read(&sc, 63);
+ if (cksum == 0 || (cksum & 0xff) != val)
+ return 0;
+
+ return 1;
+}
+
+static void
+spdmem_attach(struct device *parent, struct device *self, void *aux)
+{
+ struct spdmem_softc *sc = device_private(self);
+ struct i2c_attach_args *ia = aux;
+ uint8_t val;
+ const char *type;
+
+ sc->sc_tag = ia->ia_tag;
+ sc->sc_addr = ia->ia_addr;
+
+ val = spdmem_read(sc, SPDMEM_MEMTYPE);
+ switch (val) {
+ case SPDMEM_MEMTYPE_EDO:
+ type = "EDO";
+ break;
+ case SPDMEM_MEMTYPE_SDRAM:
+ type = "SDRAM";
+ break;
+ case SPDMEM_MEMTYPE_DDRSDRAM:
+ type = "DDR SDRAM";
+ break;
+ case SPDMEM_MEMTYPE_DDR2SDRAM:
+ type = "DDR2 SDRAM";
+ break;
+ default:
+ aprint_error(": unknown (0x%02x) memory type\n", val);
+ return;
+ }
+
+ aprint_normal(": %s memory module\n", type);
+
+ return;
+}
+
+static uint8_t
+spdmem_read(struct spdmem_softc *sc, uint8_t reg)
+{
+ uint8_t val;
+
+ iic_acquire_bus(sc->sc_tag,0);
+ iic_exec(sc->sc_tag, I2C_OP_READ, sc->sc_addr, ®, 1, &val, 1, 0);
+ iic_release_bus(sc->sc_tag, 0);
+
+ return val;
+}
+
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