Subject: Re: VIA C7 CPU and crypto capabilities SOLVED partially
To: Heron Gallegos <gallegos@csxxi.net.mx>
From: Juan RP <juan@xtrarom.org>
List: current-users
Date: 07/01/2007 10:39:36
On Sat, 30 Jun 2007 21:50:02 -0500 (CDT)
Heron Gallegos <gallegos@csxxi.net.mx> wrote:

> I have tested the patches with the following modification:
> 
>                  if (rdmsr(MSR_MISC_ENABLE) & (1 << 16)) {
>                          if (cpu_vendor == CPUVENDOR_INTEL)
>                                  est_init(CPUVENDOR_INTEL);
>                          if (cpu_vendor == CPUVENDOR_IDT)
>                                  est_init(CPUVENDOR_IDT);
>                  } else
>                          aprint_normal("%s: Enhanced SpeedStep disabled by
> 
> and I have this output:
> 
> cpu0: using thermal monitor 2
> cpu0: Enhanced SpeedStep (1004 mV) 533 MHz
> cpu0: unknown Enhanced SpeedStep CPU.
> cpu0: using only highest, current and lowest power states.
> cpu0: Enhanced SpeedStep frequencies available (MHz): 667 533 533
> cpu0: calibrating local timer
> 
> The cpu is marked as "unknown", but it is in the list of
> x86/x86/est.c C7M_770_ULV

Ok, as it's using CPUVENDOR_IDT we have to change x86/x86/est.c to use
IDT too.

Try changing this line:

ENTRY(VIA,   BUS100, C7M_770_ULV),

to

ENTRY(IDT, BUS100, C7M_770_ULV),

-- 
Juan Romero Pardines	- The NetBSD Project
http://plog.xtrarom.org	- NetBSD/pkgsrc news in Spanish