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On Sat, Mar 17, 2007 at 02:24:47AM +0100, Juan RP wrote:
>=20
> Hi,
>=20
> I'm posting patches for review and test. The patches do:

I tried:
SHA1 (est_smp_mask.diff) =3D 2e84625ce3734c6869909e470c0ec8dd655b7b69
SHA1 (msr_ipi_handlers_mask.diff) =3D 4c06b3db3ec9544aae46093315fd900edbb4b=
897

They work for me, with one exception: right after boot, when estd
starts and nothing has ever set the MSR's, the first time estd sets
the speed down it may run on the second cpu, and the code may decide
there was no change and not send the ipi.

I'm not too fussed about that, and it's specific to the core duo where
the clocks are bolted together even though each cpu has its own MSR
values.  It's resolved the next time estd makes another change.

Thanks for this, it's a practical workaround to an annoying issue - I
wouldn't spend too much more time on it, since we know it should all
be replaced when we can later have per-cpu lwps processing requests
like this from a workqueue, rather than an IPI.

When that happens, and as part of the more general cpu framework, it
seems that we should expose the est frequency on a per-cpu basis.
While the clocks on some multicore chips are glued together, that's
not true for other multicore cpus and especially for multisocket
motherboards.  On such systems, there's no reason I should run all my
cores fast just because I have one cpu-hungry process to run (or that
core slow becase all the others are idle).

--
Dan.


msr_cpu_broadcast: mcb->msr_value=3D3116
msr_cpu_broadcast_main: mcb->msr_type=3D409

msr_cpu_broadcast_main: ---- START ----
msr_cpu_broadcast_main: msr_setvalue=3D3116 msr_setmask=3D65535
msr_cpu_broadcast_main: before write
msr_cpu_broadcast_main: after write
msr_cpu_broadcast_main: before pause
msr_cpu_broadcast_main: msr_runcount=3D2 ncpu=3D2
msr_cpu_broadcast_main: after pause
cpu0: ci_msr_rvalue=3D0x3116
cpu1: ci_msr_rvalue=3D0x3116
msr_cpu_broadcast_main: ----- END -----

msr_cpu_broadcast: mcb->msr_value=3D1555
msr_cpu_broadcast_main: mcb->msr_type=3D409

msr_cpu_broadcast_main: ---- START ----
msr_cpu_broadcast_main: msr_setvalue=3D1555 msr_setmask=3D65535
msr_cpu_broadcast_main: before write
msr_cpu_broadcast_main: after write
msr_cpu_broadcast_main: before pause
msr_cpu_broadcast_main: msr_runcount=3D2 ncpu=3D2
msr_cpu_broadcast_main: after pause
cpu0: ci_msr_rvalue=3D0x1555
cpu1: ci_msr_rvalue=3D0x1555
msr_cpu_broadcast_main: ----- END -----


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