Subject: Re: PERFCTRS on i386
To: Chris Ross <cross+netbsd@distal.com>
From: Stephan Thesing <thesing@cs.uni-sb.de>
List: current-users
Date: 07/27/2004 05:33:25
Hi,

On Mon, 26 Jul 2004, Chris Ross wrote:

> Date: Mon, 26 Jul 2004 14:52:19 -0400
> From: Chris Ross <cross+netbsd@distal.com>
> To: current-users@NetBSD.org
> Subject: PERFCTRS on i386
> 
>
>  This is not in the GENERIC config file, because it makes a
> comment about it not working with MP "just yet".  Anyone
> know the status of this?  I have an i386 MP machine, so I
> might be able to help work out details on it if it's not
> likely to be really big or complicated...

just my 0.01 EUR:

at the moment the performance counters not only do not work
on MP but they also do not work on Pentium IV class cpus.

The performance counters on UP are configured to count and then
started.  Whatever you read back later includes all the events
from other processes that may have run on the CPU in the meantime
(if the first process had been preempted).

This obviously cannot work with MP because you cannot configure all
performance counters of all CPUs at once and you cannot glue one process to one 
processor either (after a process preemption the process may end up
on another CPU when resuming execution). It is not possible to read the 
performance counters of one CPU by code running on another CPU.

So to make counters work information about performance counters has to be kept
for each process and CPU and counting has to handled during context switches.
For threaded applications with several scheduler activations active at the same 
time (even on different processors) this becomes a little bit complicated....

For PIV, the data structures of the interface that pmc provides have
to be extended because PIV uses a different model for its performance
counters...

It seems to me that this will add a reasonable amount of overhead to the
context switch path...

Regards....
 	Stephan

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