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I think I found the problem.
The way the 8233A IDE controller is dealy with is wrong, it needs
an own timing table.
(the driver ties timing tables to UDMA capabilities, which is
suboptimal)

The appended patch helps for me; it is a proof-of concept however
which breaks all the UDMA100-only controllers.
(The timing table is borrowed from FreeBSD.)
The driver needs some cleanup to fix it correctly.
(The UDMA66 stuff looks strange too... but I won't argue without
a manual.)

best regards
Matthias



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Index: dev/pci/pciide_apollo_reg.h
===================================================================
RCS file: /cvsroot/syssrc/sys/dev/pci/pciide_apollo_reg.h,v
retrieving revision 1.11
diff -u -r1.11 pciide_apollo_reg.h
--- dev/pci/pciide_apollo_reg.h	2002/04/23 20:41:17	1.11
+++ dev/pci/pciide_apollo_reg.h	2002/08/14 13:40:17
@@ -89,6 +89,8 @@
 	(((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
 #define APO_UDMA_CLK66(channel) (0x08 << ((1 - (channel)) << 4))
 
+static const int8_t apollo_udma133_tim[] __attribute__((__unused__)) =
+    {0x00, 0x00, 0xf6, 0x00, 0xf2, 0xf1, 0xf0};
 static const int8_t apollo_udma100_tim[] __attribute__((__unused__)) =
     /* XXX Check modes other than 2, 4, 5 */
     {0x0f, 0x07, 0x04, 0x02, 0x01, 0x00};
Index: dev/pci/pciide.c
===================================================================
RCS file: /cvsroot/syssrc/sys/dev/pci/pciide.c,v
retrieving revision 1.164
diff -u -r1.164 pciide.c
--- dev/pci/pciide.c	2002/08/10 16:33:23	1.164
+++ dev/pci/pciide.c	2002/08/14 13:40:18
@@ -2305,9 +2305,8 @@
 			    APO_UDMA_EN_MTH(chp->channel, drive);
 			if (sc->sc_wdcdev.UDMA_cap == 5) {
 				/* 686b */
-				udmatim_reg |= APO_UDMA_CLK66(chp->channel);
 				udmatim_reg |= APO_UDMA_TIME(chp->channel,
-				    drive, apollo_udma100_tim[drvp->UDMA_mode]);
+				    drive, apollo_udma133_tim[drvp->UDMA_mode]);
 			} else if (sc->sc_wdcdev.UDMA_cap == 4) {
 				/* 596b or 686a */
 				udmatim_reg |= APO_UDMA_CLK66(chp->channel);

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