Subject: Re: SMP
To: Sergey Svishchev <svs@ropnet.ru>
From: Andrew Gillham <gillhaa@ghost.whirlpool.com>
List: current-users
Date: 04/27/1999 12:55:05
Sergey Svishchev writes:
> On Tue, Apr 27, 1999 at 01:05:58AM -0400, Andrew Gillham wrote:
> 
> > What would it take to at least initialize the MPS compliant bits and set
> > the second CPU to running the idle loop like on the sparc port?  I really
> > like seeing my second cpu at least attached on my sparc!  
> 
> Try the patch in PR#6928 ("AP processor bootstrap").  i386 only.

Cool!  I should check the PR database more often.  So how hard would
it be to implement the "giant kernel lock" concept, so at least we
could launch rc5des on our auxiliary cpu?
Stefan, are you working on this?

-Andrew
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