Subject: Re: MX98713 support for NetBSD?
To: None <root@ihack.net>
From: KOUCHI Takayoshi <kouchi@kuis.kyoto-u.ac.jp>
List: current-users
Date: 10/30/1998 17:03:29
> Anyway, if you send me your patch, I'll verify that it works on my
> cards and commit it.
Thanks a lot.
Here is my dirty:-) patch for current sources.
This patch does 4 things:
1) add Macronix and MX98713 PCI ids to recognize
2) add register CSR16 which only appears in MX98713
3) add magic code (0x0f37xxxx) to disable annoying dups
4) my nic's ethernet address begins at offset 20 of eeprom...
My MX98713 card is Planex FNW-9601-T, and it seems to have
different eeprom structure than other DEC dc2114x cards.
In addition, I'm still suffering from 'de0: abnormal interrupt...'.
Here is my card's eeprom dump:
0000: 00 00 00 00 00 00 00 00 00 40 05 51 a1 07 00 00
0010: 00 00 00 00 00 40 05 50 f8 d2 00 00 00 00 00 00
0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0070: 14 00 00 01 00 00 00 00 00 00 12 05 d9 10 55 f4
And my kernel's MX98713 probe message from dmesg:
de0 at pci0 dev 10 function 0
de0: interrupting at irq 10
de0: MX98713 [10-100Mb/s] pass 0.0
de0: address 00:40:05:50:f8:d2
de0: enabling 100baseTX port
...
de0: enabling 10baseT port
I only tested this on only 10baseT environment, using
'ifconfig de0 media 10baseT'.
*** dev/ic/dc21040reg.h.orig Sat May 23 20:13:50 1998
--- dev/ic/dc21040reg.h Fri Oct 30 15:43:45 1998
***************
*** 533,542 ****
--- 533,544 ----
#define DE425_EISA_IOSIZE 0x100
#define DEC_VENDORID 0x1011
+ #define MACRONIX_VENDORID 0x10d9
#define CHIPID_21040 0x0002
#define CHIPID_21140 0x0009
#define CHIPID_21041 0x0014
#define CHIPID_21142 0x0019
+ #define CHIPID_MX98713 0x0512
#define PCI_VENDORID(x) ((x) & 0xFFFF)
#define PCI_CHIPID(x) (((x) >> 16) & 0xFFFF)
*** dev/pci/if_devar.h.orig Wed Sep 30 20:14:41 1998
--- dev/pci/if_devar.h Fri Oct 30 15:42:13 1998
***************
*** 112,117 ****
--- 112,118 ----
tulip_csrptr_t csr_13; /* CSR13 */
tulip_csrptr_t csr_14; /* CSR14 */
tulip_csrptr_t csr_15; /* CSR15 */
+ tulip_csrptr_t csr_16; /* CSR16 (only in MX98713) */
} tulip_regfile_t;
#define csr_enetrom csr_9 /* 21040 */
***************
*** 194,200 ****
typedef enum {
TULIP_21040, TULIP_DE425,
TULIP_21041,
! TULIP_21140, TULIP_21140A, TULIP_21142,
TULIP_21143,
TULIP_CHIPID_UNKNOWN
} tulip_chipid_t;
--- 195,203 ----
typedef enum {
TULIP_21040, TULIP_DE425,
TULIP_21041,
! TULIP_21140, TULIP_21140A,
! TULIP_MX98713,
! TULIP_21142,
TULIP_21143,
TULIP_CHIPID_UNKNOWN
} tulip_chipid_t;
***************
*** 715,720 ****
--- 718,724 ----
"21041 [10Mb/s]",
"21140 [10-100Mb/s]",
"21140A [10-100Mb/s]",
+ "MX98713 [10-100Mb/s]",
"21142 [10-100Mb/s]",
"21143 [10-100Mb/s]",
};
*** dev/pci/if_de.c.orig Sat Sep 26 20:30:54 1998
--- dev/pci/if_de.c Fri Oct 30 15:36:56 1998
***************
*** 388,393 ****
--- 388,397 ----
tulip_mii_writereg(sc, sc->tulip_phyaddr, PHYREG_CONTROL, data);
}
}
+ #if 1 /* KOUCHI */
+ TULIP_CSR_WRITE(sc, csr_16, 0x0f370000
+ | (TULIP_CSR_READ(sc, csr_16) & 0xffff));
+ #endif
}
static void
***************
*** 2843,2848 ****
--- 2847,2861 ----
}
+ #if 1 /* KOUCHI */
+ /*
+ XXX
+ My board's ethernet addres begins
+ at rombuf[20]
+ */
+ bcopy(&sc->tulip_rombuf[20], sc->tulip_enaddr, 6);
+ return 0;
+ #endif
if (bcmp(&sc->tulip_rombuf[0], &sc->tulip_rombuf[16], 8) != 0) {
/*
* Some folks don't use the standard ethernet rom format
***************
*** 4722,4727 ****
--- 4735,4741 ----
#ifdef BIG_PACKET
&& sc->tulip_chipid != TULIP_21140
&& sc->tulip_chipid != TULIP_21140A
+ && sc->tulip_chipid != TULIP_MX98713
&& sc->tulip_chipid != TULIP_21041
#endif
) {
***************
*** 5169,5174 ****
--- 5183,5191 ----
sc->tulip_csrs.csr_13 = csr_base + 13 * csr_size;
sc->tulip_csrs.csr_14 = csr_base + 14 * csr_size;
sc->tulip_csrs.csr_15 = csr_base + 15 * csr_size;
+ #if 1 /* KOUCHI */
+ sc->tulip_csrs.csr_16 = csr_base + 16 * csr_size;
+ #endif
#if defined(TULIP_EISA)
sc->tulip_csrs.csr_enetrom = csr_base + DE425_ENETROM_OFFSET;
#endif
***************
*** 5235,5240 ****
--- 5252,5260 ----
pcici_t config_id,
pcidi_t device_id)
{
+ if (PCI_VENDORID(device_id) == MACRONIX_VENDORID)
+ if (PCI_CHIPID(device_id) == CHIPID_MX98713)
+ return "Macronix MX98713 Ethernet";
if (PCI_VENDORID(device_id) != DEC_VENDORID)
return NULL;
if (PCI_CHIPID(device_id) == CHIPID_21040)
***************
*** 5286,5301 ****
unsigned id;
id = pci_inl(pa, PCI_VENDOR_ID);
! if (PCI_VENDORID(id) != DEC_VENDORID)
! return 0;
! id = PCI_CHIPID(id);
! if (id != CHIPID_21040 && id != CHIPID_21041
&& id != CHIPID_21140 && id != CHIPID_21142)
return 0;
irq = pci_inl(pa, PCI_I_LINE) & 0xFF;
if (irq == 0 || irq >= 16) {
printf("de?: invalid IRQ %d; skipping\n", irq);
return 0;
}
return 1;
}
--- 5306,5329 ----
unsigned id;
id = pci_inl(pa, PCI_VENDOR_ID);
! if (PCI_VENDORID(id) == DEC_VENDORID) {
! id = PCI_CHIPID(id);
! if (id != CHIPID_21040 && id != CHIPID_21041
&& id != CHIPID_21140 && id != CHIPID_21142)
+ return 0;
+ } else if (PCI_VENDORID(id) == MACRONIX_VENDORID) {
+ id = PCI_CHIPID(id);
+ if (id != CHIPID_MX98713)
+ return 0;
+ } else {
return 0;
+ }
irq = pci_inl(pa, PCI_I_LINE) & 0xFF;
if (irq == 0 || irq >= 16) {
printf("de?: invalid IRQ %d; skipping\n", irq);
return 0;
+ } else { /* KOUCHI */
+ printf("de?: IRQ %d\n", irq);
}
return 1;
}
***************
*** 5430,5443 ****
{
struct pci_attach_args *pa = (struct pci_attach_args *) aux;
! if (PCI_VENDORID(pa->pa_id) != DEC_VENDORID)
! return 0;
! if (PCI_CHIPID(pa->pa_id) == CHIPID_21040
! || PCI_CHIPID(pa->pa_id) == CHIPID_21041
! || PCI_CHIPID(pa->pa_id) == CHIPID_21140
! || PCI_CHIPID(pa->pa_id) == CHIPID_21142)
! return 1;
!
return 0;
}
--- 5458,5473 ----
{
struct pci_attach_args *pa = (struct pci_attach_args *) aux;
! if (PCI_VENDORID(pa->pa_id) == DEC_VENDORID) {
! if (PCI_CHIPID(pa->pa_id) == CHIPID_21040
! || PCI_CHIPID(pa->pa_id) == CHIPID_21041
! || PCI_CHIPID(pa->pa_id) == CHIPID_21140
! || PCI_CHIPID(pa->pa_id) == CHIPID_21142)
! return 1;
! } else if (PCI_VENDORID(pa->pa_id) == MACRONIX_VENDORID) {
! if (PCI_CHIPID(pa->pa_id) == CHIPID_MX98713)
! return 1;
! }
return 0;
}
***************
*** 5543,5548 ****
--- 5573,5581 ----
chipid = (revinfo >= 0x20) ? TULIP_21140A : TULIP_21140;
else if (PCI_CHIPID(id) == CHIPID_21142)
chipid = (revinfo >= 0x20) ? TULIP_21143 : TULIP_21142;
+ } else if (PCI_VENDORID(id) == MACRONIX_VENDORID) {
+ if (PCI_CHIPID(id) == CHIPID_MX98713)
+ chipid = TULIP_MX98713;
}
if (chipid == TULIP_CHIPID_UNKNOWN)
return;
***************
*** 5573,5579 ****
PCI_GETBUSDEVINFO(sc);
sc->tulip_chipid = chipid;
sc->tulip_flags |= TULIP_DEVICEPROBE;
! if (chipid == TULIP_21140 || chipid == TULIP_21140A)
sc->tulip_features |= TULIP_HAVE_GPR|TULIP_HAVE_STOREFWD;
if (chipid == TULIP_21140A && revinfo <= 0x22)
sc->tulip_features |= TULIP_HAVE_RXBADOVRFLW;
--- 5606,5612 ----
PCI_GETBUSDEVINFO(sc);
sc->tulip_chipid = chipid;
sc->tulip_flags |= TULIP_DEVICEPROBE;
! if (chipid == TULIP_21140 || chipid == TULIP_21140A || chipid == TULIP_MX98713)
sc->tulip_features |= TULIP_HAVE_GPR|TULIP_HAVE_STOREFWD;
if (chipid == TULIP_21140A && revinfo <= 0x22)
sc->tulip_features |= TULIP_HAVE_RXBADOVRFLW;