Matt brings up some very good questions about SCSI bus utilization as
does Chris G. Demetriou. Let me try and address some of these and
then I'll sit down since this is not really germane to the alias. 8-)

The numbers I quoted were based upon a random access disk device which
was extremely fast. Also, the CPU load was low, ie. < 15%. And I would
compare the NCR chips to the QLogic chips. They are in the same
ballpark. But, the NCR chips are more portable. You can get the same
chip core on a generic Intel/Motorola bus arch in addition to the
PCI interface. This greatly helps h/w portability.

As for PCI bus utilitzation. The chip core will do some very limited
prefetch of scripts instructions when executing.  But, the real
bottleneck is in the PCI bus arbiter. There are some seriously
deficient bus arbiter implementations. And you can see this pretty
easily with a PCI bus analyzer. But, going back to the chip core,
scripts execution overhead is minimal when you're bursting bytes
through the DMA fifo from the SCSI bus directly to the PCI. Once
everything is setup and the SCSI target xfers data the bus just gets
the data bursted across it. This is a true user of bandwidth compared
to scripts fetching..

Hopefully I was clear in e-mail.. It's been a long day. Please respond
to me directly if you have questions or comments.

-brad w.