Mark P. Gooderum writes:
> 
> But on clock speed versus memory speed, remember that a 486 still isn't
> any where close to a RISC chip in cycles per instruction ratio.
> 


Well, this is a topic for another place, but cycles/instruction is not 
necessarily a good benchmark for comparing architectures-- especially
when comparing load/store (e.g. "RISC") architectures to register/memory
(e.g. x86) architectures.

I'm certainly not arguing for CISCy architectures, just a minor point....


-dwh-
dhess@cs.stanford.edu


------------------------------------------------------------------------------