Hmm, from reading ite_rt.c, I get that the chip uses the read/write
cycles of the CPU, could it be that the Retina required some sort of
wait-states at the speed your CPU is running (which is?) which your
accellerator doesn't adhere to?  If so just slowing down the code in
screen_up would suffice, maybe redo those "addqb"s to a load'n'store
pair?  I'm way off my competence platform here, HW-knowhow has never
been my best skill.

Anyway, why does the code in there normally work?  As I get it, both
the CPU and the NCR chip compete for the databus, no?

If someone redoes this into CPU-only scrolling, please make the
selection binpatchable.  I guess the lowend-models wins quite alot by
using the NCR chip.

Niklas