Subject: Re: HW question & sbic sync patch
To: None <osymh@gemini.oscs.montana.edu>
From: Niklas Hallqvist <niklas@appli.se>
List: amiga-dev
Date: 08/20/1994 22:06:52
>>>>> "Michael" == Michael L Hitch <osymh@gemini.oscs.montana.edu> writes:
Michael> On Aug 19, 5:25am, Niklas Hallqvist wrote:
>> First of all, I have a question on how to best handle an amiga
>> hardware problem: On the A2000 the Z2 space will get cached by the
>> CPU from what I've heard. Now if one have volatile registers
Michael> Not quite - the only Z2 space that is cached is Z2 memory.
Michael> Any non-memory devices that autoconfigure into the Z2 memory
Michael> area are not going to be in the Memlist structures. And
Michael> since they are not in the Z2 I/O expansion area, they will
Michael> never be mapped at all by the kernel. It will require
Michael> modification to amiga_init.c and the configuration routines
Michael> to be able to handle this.
I've already done this. My GoldenGate II now gets mapped by the
NetBSD autoconfig much like the Zorro 3 cards or I/O-space
Zorro 2 dittos.
>> How about cachectl? Is it an expensive operation to toggle
Michael> Cachectl only deals with pushing the data cache and
Michael> invalidating the caches. Enabling/disabling the cache done
Michael> by manipulating the CACR to control whether caching is
Michael> enabled or not, or by manipulating the cache control bit(s)
Michael> in the MMU pages for a finer control (at a page leve).
I have no reference on any m68k MMU. Could you help me out, describing
what needs to be done for 68551, 68030 & 68040, respectively.
Niklas
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