Subject: Re: Fix for ac97.c
To: Julio M. Merino Vidal <jmmv@menta.net>
From: David Laight <david@l8s.co.uk>
List: tech-kern
Date: 09/09/2003 17:55:40
>
> I overlooked delay() units. Well, have tried with smaller delay values but
> it keeps failing.
In that case the delay is needed for something else!
> Here are all reset related timings present in the datasheet,
> in case I got them wrong:
>
> RESET Active Low Pulsewidth - Max empty
> RESER Inactive to BIT_CLK Startup Delay - Max 400,000 ns
> Setup to RESET Inactive (SYNC, SDATA_OUT) - Min 15 ns, Max empty
> Rising Edge of RESET to Hi-Z Delay - 25 ns
> RESET Rise Time - 50 ns
My guess is that the device ID (and other config) is being read in from
a serial EPROM. So that after a hard reset you have to wait long enough
for that to have been read.
Might be worth looking what the BIT_CLK is used for - if you need it to
be running the delay is quite long (also check it applies to software
resets though).
>
> auvia has a TIMEOUT=50 constant that specifies how many loop iterations
> should be done waiting for a read. I guess this computer is so fast
> (XP2600+) that the 50 value is not enough (it's not a delay()).
That is just plain borked - the compiler could even optimse the loop away!
David
--
David Laight: david@l8s.co.uk