>>>> [...two-KA630 speculation...]
>>> [...] multiple [KA630] processors do NOT share main memory.
>> They do if they want...with some restrictions.  [...via Qbus...]
> This brings up an interesting possibility.  Processes that have
> multiple threads (i.e. that would take advantage of multiple
> processors) could have their virtual addresses mapped by the VM
> system to physical addresses in the "shareable" space.

They'd have to be fairly small, or else they'd be taking tons of
pagefaults to swap pages in and out of the relatively small window the
Qbus allows.

Also, on all but one of the processors, they'd be paying a speed
penalty, and from what I recall a fairly hefty one.

> But wait...why would this have anything to do with Qbus (and its
> 22bit address space) at all?  Wouldn't such
> other-processors-accessing-my-memory transactions happen over the PMI
> bus?

As I understand it, the memory interconnect cannot deal with multiple
processors.  The only thing the processors share is the Qbus.  (I've
never actually tried cabling up more than one processor on the
interconnect.  Since I have no desire to fry any of my KA630s, and
that's a very plausible outcome if I'm right, I have no intention of
trying it, either, unless someone can point out DEC doc indicating that
it's supposed to work.)

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