Subject: Fix for MCS1850 clock chip
To: None <port-next68k@NetBSD.org>
From: Cory Bajus <cbajus@mts.net>
List: port-next68k
Date: 03/07/2006 09:35:39
Does anyone else experience weird RTC behavior (bogus time/date at
startup) om machines with the MCS1850 clock chip?  I have tried the
fix suggested in:

http://mail-index.netbsd.org/port-next68k/2001/06/22/0000.html

and it seems to correct this (at least on my colour slab).

Here are diffs (against netbsd-3-0) - can someone check these in?

Thanks,
Cory.


Index: /usr/src/sys/arch/next68k/stand/boot/rtc.c
===================================================================
RCS file: /cvsroot/src/sys/arch/next68k/stand/boot/rtc.c,v
retrieving revision 1.3
diff -u -r1.3 rtc.c
--- rtc.c       19 Jan 2005 01:58:21 -0000      1.3
+++ rtc.c       7 Mar 2006 15:20:08 -0000
@@ -107,10 +107,10 @@
        u_int secs;

        if (new_clock) {
-               secs = rtc_read(RTC_CNTR3) << 24 |
-                      rtc_read(RTC_CNTR2) << 16 |
-                      rtc_read(RTC_CNTR1) << 8  |
-                      rtc_read(RTC_CNTR0);
+               secs = rtc_read(RTC_CNTR0) << 24 |
+                      rtc_read(RTC_CNTR1) << 16 |
+                      rtc_read(RTC_CNTR2) << 8  |
+                      rtc_read(RTC_CNTR3);
        } else {
                u_char d,h,m,s;
 #define BCD_DECODE(x) (((x) >> 4) * 10 + ((x) & 0xf))


Index: /usr/src/sys/arch/next68k/next68k/rtc.c
===================================================================
RCS file: /cvsroot/src/sys/arch/next68k/next68k/rtc.c,v
retrieving revision 1.9
diff -u -r1.9 rtc.c
--- rtc.c       19 Jan 2005 01:58:21 -0000      1.9
+++ rtc.c       7 Mar 2006 15:19:03 -0000
@@ -247,10 +247,10 @@
        u_int secs = 0;

        if (new_clock) {
-               secs = rtc_read(RTC_CNTR3) << 24 |
-                               rtc_read(RTC_CNTR2) << 16 |
-                               rtc_read(RTC_CNTR1) << 8         |
-                               rtc_read(RTC_CNTR0);
+               secs = rtc_read(RTC_CNTR0) << 24 |
+                               rtc_read(RTC_CNTR1) << 16 |
+                               rtc_read(RTC_CNTR2) << 8         |
+                               rtc_read(RTC_CNTR3);
        } else {
                struct clock_ymdhms val;
                {
@@ -301,10 +301,10 @@
 #endif 
        
        if (new_clock) {
-               rtc_write(RTC_CNTR3, (secs << 24) & 0xff);
-               rtc_write(RTC_CNTR2, (secs << 16) & 0xff);
-               rtc_write(RTC_CNTR1, (secs <<    8) & 0xff);
-               rtc_write(RTC_CNTR0, (secs) & 0xff);
+               rtc_write(RTC_CNTR0, (secs << 24) & 0xff);
+               rtc_write(RTC_CNTR1, (secs << 16) & 0xff);
+               rtc_write(RTC_CNTR2, (secs <<    8) & 0xff);
+               rtc_write(RTC_CNTR3, (secs) & 0xff);

        } else {
                struct clock_ymdhms val;