ARM64 ACPI status report 2

[Jared McNeill <jmcneill%invisible.ca@localhost>]

Changes since my last update:

 - Added support for 64-bit ACPI resources. This was needed to support
   UART on ThunderX.
 - Added glue for EHCI and XHCI at ACPI. I don't have access to any
   hardware that uses these, but the HIDs are defined so we will support
   them if one ever appears.
 - Added support for using UEFI runtime services in the kernel. This
   involved reserving a range of VA as the UEFI runtime code needs to
   self-relocate itself in the bootloader, before the kernel is started.
   The bootloader was extended to support it, and MD kernel code written
   to take advantage of it. According to SBSA, this is the required method
   for accessing the Real-Time Clock. In addition, it is required that the
   OS use UEFI RT services for system shutdown and reset instead of doing
   this directly via PSCI.
 - Finally got around to implementing parse_mi_bootargs on aarch64 so we
   can pass -a/-v/-x/-s/etc flags to the kernel.
 - Added MSI-X support to the MD ARM PCI code and GIC v2m driver.
   Validated this on Overdrive 1000 and QEMU with xhci and wm drivers.
 - Added GPT support to bootaa64.efi.
 - ARM FDT memory map handling code was using extent(9), which has caused
   considerable grief due to the strictness of the API. If a bootloader
   reported a reserved memory range that didn't exactly fit within a
   memory range, we would panic and there would be no indication as this
   happens before the debug console is brought online. I replaced the
   extent(9) usage here with a new module
   (sys/arch/evbarm/fdt/fdt_memory.c) that is less strict in this respect.
 - Added a "mem" command to bootaa64.efi to dump the UEFI memory map.
 - The ACPI code was extended to support multiple segments (domains),
   which is required on ThunderX. Since the segment number needs to be
   extracted from the PCI chipset tag, this requires some MD code to
   enable the functionality. The ARM MD code was committed.
 - Added GICv3 MSI/MSI-X support. This one was a doozy. It seems for
   nearly every function related to MSIs, there are two possible ways
   for it to be implemented. QEMU doesn't emulate the Interrupt
   Translation Service (ITS) hardware in software, so to test
   this in ACPI mode I had to run QEMU on a ROCKPro64 with KVM. All is
   working there, so now I am moving on to validating this on real
   hardware.
 - Set/get affinity APIs are now implemented on GICv3 for both SPIs and
   LPIs.
 - arch/arm/pic/pic.c now implements the APIs required by
   kern/subr_interrupt.c to support the intrctl(8) tool. This allows us to
   view interrupts and event counters from userland and for pic drivers
   that support the set/get affinity APIs (armgic and gicvthree) this
   allows us to change affinity of an interrupt source at runtime.

Cheers,
Jared