On Thursday 23 October 2003 10:05 pm, Steve Woodford wrote:
> Hi,
>
> While mucking around with a wi(4) card on an xscale board, and falling
> foul of kern/23238, it occurred to me that perhaps we should provide a
> kernel config file option to enable alignment faults.
>
> To that end, I rattled up "options ARM_ENABLE_ALIGNMENT_FAULTS" together
> with the necessary glue in fault.c, and cp15 frobbing (for xscale only
> right now) in cpufuncs.c.
>
> Running a kernel with this enabled immediately showed up a bug in memcmp
> (mea culpa ;-) which I have since fixed. Other than that, both kernel
> and userland are running fine.
>
> There is an old comment in an earlier version of fault.c which alludes
> to gcc taking advantage of misaligned accesses when dealing with short
> ints. I can see how this would be useful on ARM cpus which can't do
> 16-bit loads/stores, but is it really relevant for more recent cpus?
> Does gcc still emit such code if the target cpu can do 16-bit ldr/str?
> If not, then perhaps I should enable it by default and change the
> option to ARM_DISABLE_ALIGNMENT_FAULTS...

No, it will use ldrh/strh if you it to use a CPU model supports them.  
However, we support several ARM systems without half-word load/store.  You 
can verify this yourself by looking in arm.md; all of the split patterns that 
use rotated loads have:

  "TARGET_ARM && (!arm_arch4)"

or:

          else if (!arm_arch4)