"Steven M. Bellovin" <smb@cs.columbia.edu> writes:

> Some time back, a change was made (by Greg Troxel, I thought) so that
> rbus was calculated automatically.  It doesn't seem to happen on
> amd64.  I have 3GB machine; here's what happened:

That's what I'd expect - I put the heuristic in the i386 machdep code.
If you want to add it for amd64, or a different one that matches those
platforms, that sounds sensible.  We could also have a common ruotine
somewhere, since i386 and amd64 seem to share a lot.

But, with amd64 having more address space, the whole notion of using 1G
or 2G as the rbus place seems odd.

> cbb0 at pci6 dev 0 function 0: Ricoh 5C476 PCI-CardBus bridge (rev.
> 0xba) cbb0: can't map socket base address 0xf8300000
> cbb0: can't map socket base address 0xffffffff80d02810: io mode
> cbb0: WARNING: power management not supported
> cbb0: bad Vcc request. sock_ctrl 0xffffff88, sock_status 0xffffffff
> cbb0: disabling socket
> cbb0: interrupting at ioapic0 pin 16 (irq 10)
> cbb0: WARNING: powerhook_establish is deprecated
> cardslot0 at cbb0 slot 0 flags 0
>
>
>
> 		--Steve Bellovin, http://www.cs.columbia.edu/~smb