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CVS commit: pkgsrc/graphics/MesaLib
Module Name: pkgsrc
Committed By: markd
Date: Wed Mar 22 20:22:31 UTC 2017
Modified Files:
pkgsrc/graphics/MesaLib: Makefile distinfo options.mk
Added Files:
pkgsrc/graphics/MesaLib/patches:
patch-src_gallium_auxiliary_draw_draw__llvm.c
patch-src_gallium_auxiliary_gallivm_lp__bld__intr.c
patch-src_gallium_auxiliary_gallivm_lp__bld__intr.h
patch-src_gallium_auxiliary_gallivm_lp__bld__sample__soa.c
patch-src_gallium_drivers_llvmpipe_lp__state__fs.c
patch-src_gallium_drivers_llvmpipe_lp__state__setup.c
patch-src_gallium_drivers_r600_r600__llvm.c
patch-src_gallium_drivers_radeon_radeon__llvm__util.c
patch-src_gallium_drivers_radeon_radeon__setup__tgsi__llvm.c
patch-src_gallium_drivers_radeonsi_si__shader.c
Log Message:
Backport patches to handle an API change in llvm4. Bump PKGREVISION.
To generate a diff of this commit:
cvs rdiff -u -r1.136 -r1.137 pkgsrc/graphics/MesaLib/Makefile
cvs rdiff -u -r1.119 -r1.120 pkgsrc/graphics/MesaLib/distinfo
cvs rdiff -u -r1.54 -r1.55 pkgsrc/graphics/MesaLib/options.mk
cvs rdiff -u -r0 -r1.1 \
pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_draw_draw__llvm.c \
pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_gallivm_lp__bld__intr.c \
pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_gallivm_lp__bld__intr.h \
pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_gallivm_lp__bld__sample__soa.c \
pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_llvmpipe_lp__state__fs.c \
pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_llvmpipe_lp__state__setup.c \
pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_r600_r600__llvm.c \
pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_radeon_radeon__llvm__util.c \
pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_radeon_radeon__setup__tgsi__llvm.c \
pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_radeonsi_si__shader.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: pkgsrc/graphics/MesaLib/Makefile
diff -u pkgsrc/graphics/MesaLib/Makefile:1.136 pkgsrc/graphics/MesaLib/Makefile:1.137
--- pkgsrc/graphics/MesaLib/Makefile:1.136 Mon Mar 20 23:59:01 2017
+++ pkgsrc/graphics/MesaLib/Makefile Wed Mar 22 20:22:31 2017
@@ -1,8 +1,8 @@
-# $NetBSD: Makefile,v 1.136 2017/03/20 23:59:01 gdt Exp $
+# $NetBSD: Makefile,v 1.137 2017/03/22 20:22:31 markd Exp $
DISTNAME= mesa-11.2.2
PKGNAME= ${DISTNAME:S/mesa/MesaLib/}
-PKGREVISION= 4
+PKGREVISION= 5
CATEGORIES= graphics x11
MASTER_SITES= ftp://ftp.freedesktop.org/pub/mesa/${PKGVERSION_NOREV}/
EXTRACT_SUFX= .tar.xz
Index: pkgsrc/graphics/MesaLib/distinfo
diff -u pkgsrc/graphics/MesaLib/distinfo:1.119 pkgsrc/graphics/MesaLib/distinfo:1.120
--- pkgsrc/graphics/MesaLib/distinfo:1.119 Sun Jan 15 00:14:21 2017
+++ pkgsrc/graphics/MesaLib/distinfo Wed Mar 22 20:22:31 2017
@@ -1,4 +1,4 @@
-$NetBSD: distinfo,v 1.119 2017/01/15 00:14:21 wiz Exp $
+$NetBSD: distinfo,v 1.120 2017/03/22 20:22:31 markd Exp $
SHA1 (mesa-11.2.2.tar.xz) = c3805020be6fef77d3b96a5ddf4ddc256dee16ff
RMD160 (mesa-11.2.2.tar.xz) = 14bca7cc76015e53db2fafcebb8540f451be5aab
@@ -11,13 +11,23 @@ SHA1 (patch-src_compiler_glsl_glsl__pars
SHA1 (patch-src_egl_drivers_dri2_platform__drm.c) = 99b6dd6739c29551ae2c885eabd7babd159fc3e5
SHA1 (patch-src_egl_drivers_dri2_platform__x11.c) = 04b6ef8e755f226fbe3e6f2bea6c9e2a56a783ca
SHA1 (patch-src_egl_main_eglglobals.c) = 2d81ae27f09162d23bc684456cc5fef48c042652
+SHA1 (patch-src_gallium_auxiliary_draw_draw__llvm.c) = fc1a313eed85042b7ac2db67c6fd1902074fb43a
+SHA1 (patch-src_gallium_auxiliary_gallivm_lp__bld__intr.c) = 4c40981645675cfeb55bf28317158ebb6332268d
+SHA1 (patch-src_gallium_auxiliary_gallivm_lp__bld__intr.h) = 07f2606d94b9af30df838206841cbcd8a198d799
+SHA1 (patch-src_gallium_auxiliary_gallivm_lp__bld__sample__soa.c) = e94692f8dbae1247e5780cebf24e4a333b1fcd0a
SHA1 (patch-src_gallium_auxiliary_util_u__format__tests.c) = 4d5e4677c2825778c43440ab131b8807f6840975
SHA1 (patch-src_gallium_auxiliary_util_u__math.h) = 812e4a5291aea47e06505f09891e0434c4d9c34d
SHA1 (patch-src_gallium_auxiliary_util_u__network.c) = 283f505af780071dc9fd7914f8065e3fb7d8a4fd
SHA1 (patch-src_gallium_auxiliary_util_u__network.h) = c6106d67b4fa9db0d790474182d6e0ce0c5da677
+SHA1 (patch-src_gallium_drivers_llvmpipe_lp__state__fs.c) = b14ca18ae1dc03901b197c86e67052bbb154a81f
+SHA1 (patch-src_gallium_drivers_llvmpipe_lp__state__setup.c) = 1d6c24bc598da9945ce75c1cc6a2334228d66b41
SHA1 (patch-src_gallium_drivers_nouveau_codegen_nv50__ir__peephole.cpp) = 5fc2ef7eafac3006896af96bac8176c79b17cfdc
SHA1 (patch-src_gallium_drivers_nouveau_nouveau__vp3__video.c) = ae1b6eb4df3e4db0f37e44118cdf69b16f3c471e
SHA1 (patch-src_gallium_drivers_nouveau_nv50_nv84__video.c) = 1b4239fe053523835ecac006894bdb0cde0ee626
+SHA1 (patch-src_gallium_drivers_r600_r600__llvm.c) = 37ffa4df519df4b7a35b686448e823200d5144ae
+SHA1 (patch-src_gallium_drivers_radeon_radeon__llvm__util.c) = 63852f9abaa4d75d0043ae748bba718a35459a11
+SHA1 (patch-src_gallium_drivers_radeon_radeon__setup__tgsi__llvm.c) = 7957999b555c9c2e68a1d9b2eece5989e6612ff3
+SHA1 (patch-src_gallium_drivers_radeonsi_si__shader.c) = 44b790ee0d8b843421114b61ddae6a4d4ef2a099
SHA1 (patch-src_gallium_targets_dri_Makefile.in) = a9a8265d97297040a3e3260b362ca920ec852280
SHA1 (patch-src_gallium_winsys_radeon_drm_radeon__drm__winsys.c) = 2358b7d5ea89e28cb3ac07a408b18e8bf55e057a
SHA1 (patch-src_gallium_winsys_svga_drm_vmw__screen.c) = 4b2ae565377b1a0396c8bf6b2663c261592b8e5e
Index: pkgsrc/graphics/MesaLib/options.mk
diff -u pkgsrc/graphics/MesaLib/options.mk:1.54 pkgsrc/graphics/MesaLib/options.mk:1.55
--- pkgsrc/graphics/MesaLib/options.mk:1.54 Mon Mar 20 23:59:01 2017
+++ pkgsrc/graphics/MesaLib/options.mk Wed Mar 22 20:22:31 2017
@@ -1,4 +1,4 @@
-# $NetBSD: options.mk,v 1.54 2017/03/20 23:59:01 gdt Exp $
+# $NetBSD: options.mk,v 1.55 2017/03/22 20:22:31 markd Exp $
PKG_OPTIONS_VAR= PKG_OPTIONS.MesaLib
PKG_SUPPORTED_OPTIONS= llvm dri
@@ -178,6 +178,7 @@ CONFIGURE_ARGS+= --enable-gallium-llvm
CONFIGURE_ARGS+= --enable-r600-llvm-compiler
.include "../../devel/libelf/buildlink3.mk"
CPPFLAGS+= -I${BUILDLINK_PREFIX.libelf}/include/libelf
+BUILDLINK_API_DEPENDS.libLLVM+= libLLVM>=4.0
.include "../../lang/libLLVM/buildlink3.mk"
CONFIGURE_ENV+= ac_cv_path_ac_pt_LLVM_CONFIG=${LLVM_CONFIG_PATH}
.else # !llvm
Added files:
Index: pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_draw_draw__llvm.c
diff -u /dev/null pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_draw_draw__llvm.c:1.1
--- /dev/null Wed Mar 22 20:22:31 2017
+++ pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_draw_draw__llvm.c Wed Mar 22 20:22:31 2017
@@ -0,0 +1,27 @@
+$NetBSD: patch-src_gallium_auxiliary_draw_draw__llvm.c,v 1.1 2017/03/22 20:22:31 markd Exp $
+
+llvm api change
+commit 8bdd52c8f3595128cbc1da4f23cdb10ff861a6ef
+
+--- src/gallium/auxiliary/draw/draw_llvm.c.orig 2016-05-09 12:51:42.000000000 +0000
++++ src/gallium/auxiliary/draw/draw_llvm.c
+@@ -1612,8 +1612,7 @@ draw_llvm_generate(struct draw_llvm *llv
+ LLVMSetFunctionCallConv(variant_func, LLVMCCallConv);
+ for (i = 0; i < num_arg_types; ++i)
+ if (LLVMGetTypeKind(arg_types[i]) == LLVMPointerTypeKind)
+- LLVMAddAttribute(LLVMGetParam(variant_func, i),
+- LLVMNoAliasAttribute);
++ lp_add_function_attr(variant_func, i + 1, LP_FUNC_ATTR_NOALIAS);
+
+ context_ptr = LLVMGetParam(variant_func, 0);
+ io_ptr = LLVMGetParam(variant_func, 1);
+@@ -2158,8 +2157,7 @@ draw_gs_llvm_generate(struct draw_llvm *
+
+ for (i = 0; i < Elements(arg_types); ++i)
+ if (LLVMGetTypeKind(arg_types[i]) == LLVMPointerTypeKind)
+- LLVMAddAttribute(LLVMGetParam(variant_func, i),
+- LLVMNoAliasAttribute);
++ lp_add_function_attr(variant_func, i + 1, LP_FUNC_ATTR_NOALIAS);
+
+ context_ptr = LLVMGetParam(variant_func, 0);
+ input_array = LLVMGetParam(variant_func, 1);
Index: pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_gallivm_lp__bld__intr.c
diff -u /dev/null pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_gallivm_lp__bld__intr.c:1.1
--- /dev/null Wed Mar 22 20:22:31 2017
+++ pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_gallivm_lp__bld__intr.c Wed Mar 22 20:22:31 2017
@@ -0,0 +1,105 @@
+$NetBSD: patch-src_gallium_auxiliary_gallivm_lp__bld__intr.c,v 1.1 2017/03/22 20:22:31 markd Exp $
+
+llvm api change
+commit 8bdd52c8f3595128cbc1da4f23cdb10ff861a6ef
+
+--- src/gallium/auxiliary/gallivm/lp_bld_intr.c.orig 2016-05-09 12:20:52.000000000 +0000
++++ src/gallium/auxiliary/gallivm/lp_bld_intr.c
+@@ -45,6 +45,7 @@
+
+
+ #include "util/u_debug.h"
++#include "util/u_math.h"
+
+ #include "lp_bld_const.h"
+ #include "lp_bld_intr.h"
+@@ -75,6 +76,65 @@ lp_declare_intrinsic(LLVMModuleRef modul
+ return function;
+ }
+
++#if HAVE_LLVM < 0x0400
++static LLVMAttribute lp_attr_to_llvm_attr(enum lp_func_attr attr)
++{
++ switch (attr) {
++ case LP_FUNC_ATTR_ALWAYSINLINE: return LLVMAlwaysInlineAttribute;
++ case LP_FUNC_ATTR_BYVAL: return LLVMByValAttribute;
++ case LP_FUNC_ATTR_INREG: return LLVMInRegAttribute;
++ case LP_FUNC_ATTR_NOALIAS: return LLVMNoAliasAttribute;
++ case LP_FUNC_ATTR_NOUNWIND: return LLVMNoUnwindAttribute;
++ case LP_FUNC_ATTR_READNONE: return LLVMReadNoneAttribute;
++ case LP_FUNC_ATTR_READONLY: return LLVMReadOnlyAttribute;
++ default:
++ _debug_printf("Unhandled function attribute: %x\n", attr);
++ return 0;
++ }
++}
++
++#else
++
++static const char *attr_to_str(enum lp_func_attr attr)
++{
++ switch (attr) {
++ case LP_FUNC_ATTR_ALWAYSINLINE: return "alwaysinline";
++ case LP_FUNC_ATTR_BYVAL: return "byval";
++ case LP_FUNC_ATTR_INREG: return "inreg";
++ case LP_FUNC_ATTR_NOALIAS: return "noalias";
++ case LP_FUNC_ATTR_NOUNWIND: return "nounwind";
++ case LP_FUNC_ATTR_READNONE: return "readnone";
++ case LP_FUNC_ATTR_READONLY: return "readonly";
++ default:
++ _debug_printf("Unhandled function attribute: %x\n", attr);
++ return 0;
++ }
++}
++
++#endif
++
++void
++lp_add_function_attr(LLVMValueRef function,
++ int attr_idx,
++ enum lp_func_attr attr)
++{
++
++#if HAVE_LLVM < 0x0400
++ LLVMAttribute llvm_attr = lp_attr_to_llvm_attr(attr);
++ if (attr_idx == -1) {
++ LLVMAddFunctionAttr(function, llvm_attr);
++ } else {
++ LLVMAddAttribute(LLVMGetParam(function, attr_idx - 1), llvm_attr);
++ }
++#else
++ LLVMContextRef context = LLVMGetModuleContext(LLVMGetGlobalParent(function));
++ const char *attr_name = attr_to_str(attr);
++ unsigned kind_id = LLVMGetEnumAttributeKindForName(attr_name,
++ strlen(attr_name));
++ LLVMAttributeRef llvm_attr = LLVMCreateEnumAttribute(context, kind_id, 0);
++ LLVMAddAttributeAtIndex(function, attr_idx, llvm_attr);
++#endif
++}
+
+ LLVMValueRef
+ lp_build_intrinsic(LLVMBuilderRef builder,
+@@ -82,7 +142,7 @@ lp_build_intrinsic(LLVMBuilderRef builde
+ LLVMTypeRef ret_type,
+ LLVMValueRef *args,
+ unsigned num_args,
+- LLVMAttribute attr)
++ unsigned attr_mask)
+ {
+ LLVMModuleRef module = LLVMGetGlobalParent(LLVMGetBasicBlockParent(LLVMGetInsertBlock(builder)));
+ LLVMValueRef function;
+@@ -101,8 +161,12 @@ lp_build_intrinsic(LLVMBuilderRef builde
+
+ function = lp_declare_intrinsic(module, name, ret_type, arg_types, num_args);
+
+- if (attr)
+- LLVMAddFunctionAttr(function, attr);
++ attr_mask |= LP_FUNC_ATTR_NOUNWIND;
++
++ while (attr_mask) {
++ enum lp_func_attr attr = 1 << u_bit_scan(&attr_mask);
++ lp_add_function_attr(function, -1, attr);
++ }
+ }
+
+ return LLVMBuildCall(builder, function, args, num_args, "");
Index: pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_gallivm_lp__bld__intr.h
diff -u /dev/null pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_gallivm_lp__bld__intr.h:1.1
--- /dev/null Wed Mar 22 20:22:31 2017
+++ pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_gallivm_lp__bld__intr.h Wed Mar 22 20:22:31 2017
@@ -0,0 +1,44 @@
+$NetBSD: patch-src_gallium_auxiliary_gallivm_lp__bld__intr.h,v 1.1 2017/03/22 20:22:31 markd Exp $
+
+llvm api change
+commit 8bdd52c8f3595128cbc1da4f23cdb10ff861a6ef
+
+--- src/gallium/auxiliary/gallivm/lp_bld_intr.h.orig 2016-05-09 12:20:52.000000000 +0000
++++ src/gallium/auxiliary/gallivm/lp_bld_intr.h
+@@ -46,6 +46,16 @@
+ */
+ #define LP_MAX_FUNC_ARGS 32
+
++enum lp_func_attr {
++ LP_FUNC_ATTR_ALWAYSINLINE = (1 << 0),
++ LP_FUNC_ATTR_BYVAL = (1 << 1),
++ LP_FUNC_ATTR_INREG = (1 << 2),
++ LP_FUNC_ATTR_NOALIAS = (1 << 3),
++ LP_FUNC_ATTR_NOUNWIND = (1 << 4),
++ LP_FUNC_ATTR_READNONE = (1 << 5),
++ LP_FUNC_ATTR_READONLY = (1 << 6),
++ LP_FUNC_ATTR_LAST = (1 << 7)
++};
+
+ LLVMValueRef
+ lp_declare_intrinsic(LLVMModuleRef module,
+@@ -54,13 +64,18 @@ lp_declare_intrinsic(LLVMModuleRef modul
+ LLVMTypeRef *arg_types,
+ unsigned num_args);
+
++void
++lp_add_function_attr(LLVMValueRef function,
++ int attr_idx,
++ enum lp_func_attr attr);
++
+ LLVMValueRef
+ lp_build_intrinsic(LLVMBuilderRef builder,
+ const char *name,
+ LLVMTypeRef ret_type,
+ LLVMValueRef *args,
+ unsigned num_args,
+- LLVMAttribute attr);
++ unsigned attr_mask);
+
+
+ LLVMValueRef
Index: pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_gallivm_lp__bld__sample__soa.c
diff -u /dev/null pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_gallivm_lp__bld__sample__soa.c:1.1
--- /dev/null Wed Mar 22 20:22:31 2017
+++ pkgsrc/graphics/MesaLib/patches/patch-src_gallium_auxiliary_gallivm_lp__bld__sample__soa.c Wed Mar 22 20:22:31 2017
@@ -0,0 +1,24 @@
+$NetBSD: patch-src_gallium_auxiliary_gallivm_lp__bld__sample__soa.c,v 1.1 2017/03/22 20:22:31 markd Exp $
+
+llvm api change
+commit 8bdd52c8f3595128cbc1da4f23cdb10ff861a6ef
+
+--- src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c.orig 2016-05-09 12:20:52.000000000 +0000
++++ src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c
+@@ -60,6 +60,7 @@
+ #include "lp_bld_struct.h"
+ #include "lp_bld_quad.h"
+ #include "lp_bld_pack.h"
++#include "lp_bld_intr.h"
+
+
+ /**
+@@ -3315,7 +3316,7 @@ lp_build_sample_soa_func(struct gallivm_
+
+ for (i = 0; i < num_param; ++i) {
+ if(LLVMGetTypeKind(arg_types[i]) == LLVMPointerTypeKind) {
+- LLVMAddAttribute(LLVMGetParam(function, i), LLVMNoAliasAttribute);
++ lp_add_function_attr(function, i + 1, LP_FUNC_ATTR_NOALIAS);
+ }
+ }
+
Index: pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_llvmpipe_lp__state__fs.c
diff -u /dev/null pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_llvmpipe_lp__state__fs.c:1.1
--- /dev/null Wed Mar 22 20:22:31 2017
+++ pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_llvmpipe_lp__state__fs.c Wed Mar 22 20:22:31 2017
@@ -0,0 +1,16 @@
+$NetBSD: patch-src_gallium_drivers_llvmpipe_lp__state__fs.c,v 1.1 2017/03/22 20:22:31 markd Exp $
+
+llvm api change
+commit 14926330703bb5ea6a84c845e192021f057f9401
+
+--- src/gallium/drivers/llvmpipe/lp_state_fs.c.orig 2016-05-09 12:51:42.000000000 +0000
++++ src/gallium/drivers/llvmpipe/lp_state_fs.c
+@@ -2279,7 +2279,7 @@ generate_fragment(struct llvmpipe_contex
+ */
+ for(i = 0; i < Elements(arg_types); ++i)
+ if(LLVMGetTypeKind(arg_types[i]) == LLVMPointerTypeKind)
+- LLVMAddAttribute(LLVMGetParam(function, i), LLVMNoAliasAttribute);
++ lp_add_function_attr(function, i + 1, LP_FUNC_ATTR_NOALIAS);
+
+ context_ptr = LLVMGetParam(function, 0);
+ x = LLVMGetParam(function, 1);
Index: pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_llvmpipe_lp__state__setup.c
diff -u /dev/null pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_llvmpipe_lp__state__setup.c:1.1
--- /dev/null Wed Mar 22 20:22:31 2017
+++ pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_llvmpipe_lp__state__setup.c Wed Mar 22 20:22:31 2017
@@ -0,0 +1,17 @@
+$NetBSD: patch-src_gallium_drivers_llvmpipe_lp__state__setup.c,v 1.1 2017/03/22 20:22:31 markd Exp $
+
+llvm api change
+commit 14926330703bb5ea6a84c845e192021f057f9401
+
+--- src/gallium/drivers/llvmpipe/lp_state_setup.c.orig 2016-05-09 12:51:42.000000000 +0000
++++ src/gallium/drivers/llvmpipe/lp_state_setup.c
+@@ -624,8 +624,7 @@ set_noalias(LLVMBuilderRef builder,
+ int i;
+ for(i = 0; i < nr_args; ++i)
+ if(LLVMGetTypeKind(arg_types[i]) == LLVMPointerTypeKind)
+- LLVMAddAttribute(LLVMGetParam(function, i),
+- LLVMNoAliasAttribute);
++ lp_add_function_attr(function, i + 1, LP_FUNC_ATTR_NOALIAS);
+ }
+
+ static void
Index: pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_r600_r600__llvm.c
diff -u /dev/null pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_r600_r600__llvm.c:1.1
--- /dev/null Wed Mar 22 20:22:31 2017
+++ pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_r600_r600__llvm.c Wed Mar 22 20:22:31 2017
@@ -0,0 +1,71 @@
+$NetBSD: patch-src_gallium_drivers_r600_r600__llvm.c,v 1.1 2017/03/22 20:22:31 markd Exp $
+
+--- src/gallium/drivers/r600/r600_llvm.c.orig 2016-05-09 12:51:42.000000000 +0000
++++ src/gallium/drivers/r600/r600_llvm.c
+@@ -101,9 +101,9 @@ llvm_load_input_vector(
+ lp_build_const_int32(&(ctx->gallivm), 2 * (ijregs % 2) + 1), "");
+ LLVMValueRef HalfVec[2] = {
+ lp_build_intrinsic(ctx->gallivm.builder, "llvm.R600.interp.xy",
+- VecType, Args, ArgCount, LLVMReadNoneAttribute),
++ VecType, Args, ArgCount, LP_FUNC_ATTR_READNONE),
+ lp_build_intrinsic(ctx->gallivm.builder, "llvm.R600.interp.zw",
+- VecType, Args, ArgCount, LLVMReadNoneAttribute)
++ VecType, Args, ArgCount, LP_FUNC_ATTR_READNONE)
+ };
+ LLVMValueRef MaskInputs[4] = {
+ lp_build_const_int32(&(ctx->gallivm), 0),
+@@ -117,7 +117,7 @@ llvm_load_input_vector(
+ } else {
+ VecType = LLVMVectorType(ctx->soa.bld_base.base.elem_type, 4);
+ return lp_build_intrinsic(ctx->gallivm.builder, "llvm.R600.interp.const",
+- VecType, Args, ArgCount, LLVMReadNoneAttribute);
++ VecType, Args, ArgCount, LP_FUNC_ATTR_READNONE);
+ }
+ }
+
+@@ -273,7 +273,7 @@ static void llvm_emit_epilogue(struct lp
+ args[1] = base_vector;
+ adjusted_elements[chan] = lp_build_intrinsic(base->gallivm->builder,
+ "llvm.AMDGPU.dp4", bld_base->base.elem_type,
+- args, 2, LLVMReadNoneAttribute);
++ args, 2, LP_FUNC_ATTR_READNONE);
+ }
+ args[0] = lp_build_gather_values(base->gallivm,
+ adjusted_elements, 4);
+@@ -443,7 +443,7 @@ static void llvm_emit_tex(
+ args[1] = lp_build_const_int32(gallivm, R600_MAX_CONST_BUFFERS);
+ emit_data->output[0] = lp_build_intrinsic(gallivm->builder,
+ "llvm.R600.load.texbuf",
+- emit_data->dst_type, args, 2, LLVMReadNoneAttribute);
++ emit_data->dst_type, args, 2, LP_FUNC_ATTR_READNONE);
+ if (ctx->chip_class >= EVERGREEN)
+ return;
+ ctx->uses_tex_buffers = true;
+@@ -558,7 +558,7 @@ static void llvm_emit_tex(
+ };
+ LLVMValueRef ptr = lp_build_intrinsic(gallivm->builder,
+ "llvm.R600.ldptr",
+- emit_data->dst_type, ldptr_args, 10, LLVMReadNoneAttribute);
++ emit_data->dst_type, ldptr_args, 10, LP_FUNC_ATTR_READNONE);
+ LLVMValueRef Tmp = LLVMBuildExtractElement(gallivm->builder, args[0],
+ lp_build_const_int32(gallivm, 3), "");
+ Tmp = LLVMBuildMul(gallivm->builder, Tmp,
+@@ -579,7 +579,7 @@ static void llvm_emit_tex(
+
+ emit_data->output[0] = lp_build_intrinsic(gallivm->builder,
+ action->intr_name,
+- emit_data->dst_type, args, c, LLVMReadNoneAttribute);
++ emit_data->dst_type, args, c, LP_FUNC_ATTR_READNONE);
+
+ if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_TXQ &&
+ ((emit_data->inst->Texture.Texture == TGSI_TEXTURE_CUBE_ARRAY ||
+@@ -791,8 +791,7 @@ LLVMModuleRef r600_tgsi_llvm(
+ Arguments[ArgumentsCount++] = LLVMVectorType(bld_base->base.elem_type, 4);
+ radeon_llvm_create_func(ctx, NULL, 0, Arguments, ArgumentsCount);
+ for (unsigned i = 0; i < ctx->inputs_count; i++) {
+- LLVMValueRef P = LLVMGetParam(ctx->main_fn, i);
+- LLVMAddAttribute(P, LLVMInRegAttribute);
++ lp_add_function_attr(ctx->main_fn, i + 1, LP_FUNC_ATTR_INREG);
+ }
+ tgsi_scan_shader(tokens, &shader_info);
+
Index: pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_radeon_radeon__llvm__util.c
diff -u /dev/null pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_radeon_radeon__llvm__util.c:1.1
--- /dev/null Wed Mar 22 20:22:31 2017
+++ pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_radeon_radeon__llvm__util.c Wed Mar 22 20:22:31 2017
@@ -0,0 +1,27 @@
+$NetBSD: patch-src_gallium_drivers_radeon_radeon__llvm__util.c,v 1.1 2017/03/22 20:22:31 markd Exp $
+
+--- src/gallium/drivers/radeon/radeon_llvm_util.c.orig 2016-05-09 12:51:42.000000000 +0000
++++ src/gallium/drivers/radeon/radeon_llvm_util.c
+@@ -26,6 +26,13 @@
+
+ #include "radeon_llvm_util.h"
+ #include "util/u_memory.h"
++#include "gallivm/lp_bld_const.h"
++#include "gallivm/lp_bld_gather.h"
++#include "gallivm/lp_bld_flow.h"
++#include "gallivm/lp_bld_init.h"
++#include "gallivm/lp_bld_intr.h"
++#include "gallivm/lp_bld_misc.h"
++#include "gallivm/lp_bld_swizzle.h"
+
+ #include <llvm-c/BitReader.h>
+ #include <llvm-c/Core.h>
+@@ -75,7 +82,7 @@ static void radeon_llvm_optimize(LLVMMod
+ for (fn = LLVMGetFirstFunction(mod); fn; fn = LLVMGetNextFunction(fn)) {
+ /* All the non-kernel functions have internal linkage */
+ if (LLVMGetLinkage(fn) == LLVMInternalLinkage) {
+- LLVMAddFunctionAttr(fn, LLVMAlwaysInlineAttribute);
++ lp_add_function_attr(fn, -1, LP_FUNC_ATTR_ALWAYSINLINE);
+ }
+ }
+
Index: pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_radeon_radeon__setup__tgsi__llvm.c
diff -u /dev/null pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_radeon_radeon__setup__tgsi__llvm.c:1.1
--- /dev/null Wed Mar 22 20:22:31 2017
+++ pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_radeon_radeon__setup__tgsi__llvm.c Wed Mar 22 20:22:31 2017
@@ -0,0 +1,66 @@
+$NetBSD: patch-src_gallium_drivers_radeon_radeon__setup__tgsi__llvm.c,v 1.1 2017/03/22 20:22:31 markd Exp $
+
+--- src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c.orig 2016-05-09 12:51:42.000000000 +0000
++++ src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
+@@ -773,14 +773,14 @@ static void radeon_llvm_cube_to_2d_coord
+
+ cube_vec = lp_build_gather_values(bld_base->base.gallivm, in, 4);
+ v = lp_build_intrinsic(builder, "llvm.AMDGPU.cube", LLVMVectorType(type, 4),
+- &cube_vec, 1, LLVMReadNoneAttribute);
++ &cube_vec, 1, LP_FUNC_ATTR_READNONE);
+
+ for (i = 0; i < 4; ++i)
+ coords[i] = LLVMBuildExtractElement(builder, v,
+ lp_build_const_int32(gallivm, i), "");
+
+ coords[2] = lp_build_intrinsic(builder, "llvm.fabs.f32",
+- type, &coords[2], 1, LLVMReadNoneAttribute);
++ type, &coords[2], 1, LP_FUNC_ATTR_READNONE);
+ coords[2] = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_RCP, coords[2]);
+
+ mad_args[1] = coords[2];
+@@ -1215,7 +1215,7 @@ static void emit_frac(
+
+ LLVMValueRef floor = lp_build_intrinsic(builder, intr, emit_data->dst_type,
+ &emit_data->args[0], 1,
+- LLVMReadNoneAttribute);
++ LP_FUNC_ATTR_READNONE);
+ emit_data->output[emit_data->chan] = LLVMBuildFSub(builder,
+ emit_data->args[0], floor, "");
+ }
+@@ -1283,7 +1283,7 @@ build_tgsi_intrinsic_nomem(const struct
+ emit_data->output[emit_data->chan] =
+ lp_build_intrinsic(base->gallivm->builder, action->intr_name,
+ emit_data->dst_type, emit_data->args,
+- emit_data->arg_count, LLVMReadNoneAttribute);
++ emit_data->arg_count, LP_FUNC_ATTR_READNONE);
+ }
+
+ static void emit_bfi(const struct lp_build_tgsi_action * action,
+@@ -1341,7 +1341,7 @@ static void emit_lsb(const struct lp_bui
+ emit_data->output[emit_data->chan] =
+ lp_build_intrinsic(gallivm->builder, "llvm.cttz.i32",
+ emit_data->dst_type, args, Elements(args),
+- LLVMReadNoneAttribute);
++ LP_FUNC_ATTR_READNONE);
+ }
+
+ /* Find the last bit set. */
+@@ -1360,7 +1360,7 @@ static void emit_umsb(const struct lp_bu
+ LLVMValueRef msb =
+ lp_build_intrinsic(builder, "llvm.ctlz.i32",
+ emit_data->dst_type, args, Elements(args),
+- LLVMReadNoneAttribute);
++ LP_FUNC_ATTR_READNONE);
+
+ /* The HW returns the last bit index from MSB, but TGSI wants
+ * the index from LSB. Invert it by doing "31 - msb". */
+@@ -1387,7 +1387,7 @@ static void emit_imsb(const struct lp_bu
+ LLVMValueRef msb =
+ lp_build_intrinsic(builder, "llvm.AMDGPU.flbit.i32",
+ emit_data->dst_type, &arg, 1,
+- LLVMReadNoneAttribute);
++ LP_FUNC_ATTR_READNONE);
+
+ /* The HW returns the last bit index from MSB, but TGSI wants
+ * the index from LSB. Invert it by doing "31 - msb". */
Index: pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_radeonsi_si__shader.c
diff -u /dev/null pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_radeonsi_si__shader.c:1.1
--- /dev/null Wed Mar 22 20:22:31 2017
+++ pkgsrc/graphics/MesaLib/patches/patch-src_gallium_drivers_radeonsi_si__shader.c Wed Mar 22 20:22:31 2017
@@ -0,0 +1,204 @@
+$NetBSD: patch-src_gallium_drivers_radeonsi_si__shader.c,v 1.1 2017/03/22 20:22:31 markd Exp $
+
+llvm api change
+commit 8bdd52c8f3595128cbc1da4f23cdb10ff861a6ef
+
+--- src/gallium/drivers/radeonsi/si_shader.c.orig 2016-05-09 12:51:42.000000000 +0000
++++ src/gallium/drivers/radeonsi/si_shader.c
+@@ -472,7 +472,7 @@ static void declare_input_vs(
+ args[2] = buffer_index;
+ input = lp_build_intrinsic(gallivm->builder,
+ "llvm.SI.vs.load.input", ctx->v4f32, args, 3,
+- LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
++ LP_FUNC_ATTR_READNONE);
+
+ /* Break up the vec4 into individual components */
+ for (chan = 0; chan < 4; chan++) {
+@@ -834,14 +834,14 @@ static LLVMValueRef fetch_input_gs(
+ value = lp_build_intrinsic(gallivm->builder,
+ "llvm.SI.buffer.load.dword.i32.i32",
+ ctx->i32, args, 9,
+- LLVMReadOnlyAttribute | LLVMNoUnwindAttribute);
++ LP_FUNC_ATTR_READONLY);
+ if (type == TGSI_TYPE_DOUBLE) {
+ LLVMValueRef value2;
+ args[2] = lp_build_const_int32(gallivm, (param * 4 + swizzle + 1) * 256);
+ value2 = lp_build_intrinsic(gallivm->builder,
+ "llvm.SI.buffer.load.dword.i32.i32",
+ ctx->i32, args, 9,
+- LLVMReadOnlyAttribute | LLVMNoUnwindAttribute);
++ LP_FUNC_ATTR_READONLY);
+ return radeon_llvm_emit_fetch_double(bld_base,
+ value, value2);
+ }
+@@ -981,12 +981,12 @@ static void interp_fs_input(struct si_sh
+ args[1] = attr_number;
+ front = lp_build_intrinsic(gallivm->builder, intr_name,
+ ctx->f32, args, args[3] ? 4 : 3,
+- LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
++ LP_FUNC_ATTR_READNONE);
+
+ args[1] = back_attr_number;
+ back = lp_build_intrinsic(gallivm->builder, intr_name,
+ ctx->f32, args, args[3] ? 4 : 3,
+- LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
++ LP_FUNC_ATTR_READNONE);
+
+ result[chan] = LLVMBuildSelect(gallivm->builder,
+ is_face_positive,
+@@ -1003,7 +1003,7 @@ static void interp_fs_input(struct si_sh
+ args[3] = interp_param;
+ result[0] = lp_build_intrinsic(gallivm->builder, intr_name,
+ ctx->f32, args, args[3] ? 4 : 3,
+- LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
++ LP_FUNC_ATTR_READNONE);
+ result[1] =
+ result[2] = lp_build_const_float(gallivm, 0.0f);
+ result[3] = lp_build_const_float(gallivm, 1.0f);
+@@ -1018,7 +1018,7 @@ static void interp_fs_input(struct si_sh
+ args[3] = interp_param;
+ result[chan] = lp_build_intrinsic(gallivm->builder, intr_name,
+ ctx->f32, args, args[3] ? 4 : 3,
+- LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
++ LP_FUNC_ATTR_READNONE);
+ }
+ }
+ }
+@@ -1089,7 +1089,7 @@ static LLVMValueRef buffer_load_const(LL
+ LLVMValueRef args[2] = {resource, offset};
+
+ return lp_build_intrinsic(builder, "llvm.SI.load.const", return_type, args, 2,
+- LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
++ LP_FUNC_ATTR_READNONE);
+ }
+
+ static LLVMValueRef load_sample_position(struct radeon_llvm_context *radeon_bld, LLVMValueRef sample_id)
+@@ -1432,7 +1432,7 @@ static void si_llvm_init_export_args(str
+ packed = lp_build_intrinsic(base->gallivm->builder,
+ "llvm.SI.packf16",
+ ctx->i32, pack_args, 2,
+- LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
++ LP_FUNC_ATTR_READNONE);
+ args[chan + 5] =
+ LLVMBuildBitCast(base->gallivm->builder,
+ packed, ctx->f32, "");
+@@ -1577,7 +1577,7 @@ static LLVMValueRef si_scale_alpha_by_sa
+
+ coverage = lp_build_intrinsic(gallivm->builder, "llvm.ctpop.i32",
+ ctx->i32,
+- &coverage, 1, LLVMReadNoneAttribute);
++ &coverage, 1, LP_FUNC_ATTR_READNONE);
+
+ coverage = LLVMBuildUIToFP(gallivm->builder, coverage,
+ ctx->f32, "");
+@@ -1742,7 +1742,7 @@ static void si_llvm_emit_streamout(struc
+ unpack_param(ctx, ctx->param_streamout_config, 16, 7);
+
+ LLVMValueRef tid = lp_build_intrinsic(builder, "llvm.SI.tid", ctx->i32,
+- NULL, 0, LLVMReadNoneAttribute);
++ NULL, 0, LP_FUNC_ATTR_READNONE);
+
+ /* can_emit = tid < so_vtx_count; */
+ LLVMValueRef can_emit =
+@@ -2242,7 +2242,7 @@ static void si_llvm_emit_gs_epilogue(str
+ args[0] = lp_build_const_int32(gallivm, SENDMSG_GS_OP_NOP | SENDMSG_GS_DONE);
+ args[1] = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_GS_WAVE_ID);
+ lp_build_intrinsic(gallivm->builder, "llvm.SI.sendmsg",
+- ctx->voidt, args, 2, LLVMNoUnwindAttribute);
++ ctx->voidt, args, 2, LP_FUNC_ATTR_NOUNWIND);
+ }
+
+ static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context *bld_base)
+@@ -3191,7 +3191,7 @@ static void build_tex_intrinsic(const st
+ base->gallivm->builder,
+ "llvm.SI.vs.load.input", emit_data->dst_type,
+ emit_data->args, emit_data->arg_count,
+- LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
++ LP_FUNC_ATTR_READNONE);
+ return;
+ }
+
+@@ -3251,7 +3251,7 @@ static void build_tex_intrinsic(const st
+ emit_data->output[emit_data->chan] = lp_build_intrinsic(
+ base->gallivm->builder, intr_name, emit_data->dst_type,
+ emit_data->args, emit_data->arg_count,
+- LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
++ LP_FUNC_ATTR_READNONE);
+
+ /* Divide the number of layers by 6 to get the number of cubes. */
+ if (opcode == TGSI_OPCODE_TXQ &&
+@@ -3347,7 +3347,7 @@ static void si_llvm_emit_ddxy(
+
+ indices[0] = bld_base->uint_bld.zero;
+ indices[1] = lp_build_intrinsic(gallivm->builder, "llvm.SI.tid", ctx->i32,
+- NULL, 0, LLVMReadNoneAttribute);
++ NULL, 0, LP_FUNC_ATTR_READNONE);
+ store_ptr = LLVMBuildGEP(gallivm->builder, ctx->lds,
+ indices, 2, "");
+
+@@ -3419,7 +3419,7 @@ static LLVMValueRef si_llvm_emit_ddxy_in
+
+ indices[0] = bld_base->uint_bld.zero;
+ indices[1] = lp_build_intrinsic(gallivm->builder, "llvm.SI.tid", ctx->i32,
+- NULL, 0, LLVMReadNoneAttribute);
++ NULL, 0, LP_FUNC_ATTR_READNONE);
+ store_ptr = LLVMBuildGEP(gallivm->builder, ctx->lds,
+ indices, 2, "");
+
+@@ -3616,7 +3616,7 @@ static void build_interp_intrinsic(const
+ emit_data->output[chan] =
+ lp_build_intrinsic(gallivm->builder, intr_name,
+ ctx->f32, args, args[3] ? 4 : 3,
+- LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
++ LP_FUNC_ATTR_READNONE);
+ }
+ }
+
+@@ -3708,7 +3708,7 @@ static void si_llvm_emit_vertex(
+ args[0] = lp_build_const_int32(gallivm, SENDMSG_GS_OP_EMIT | SENDMSG_GS | (stream << 8));
+ args[1] = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_GS_WAVE_ID);
+ lp_build_intrinsic(gallivm->builder, "llvm.SI.sendmsg",
+- ctx->voidt, args, 2, LLVMNoUnwindAttribute);
++ ctx->voidt, args, 2, LP_FUNC_ATTR_NOUNWIND);
+ }
+
+ /* Cut one primitive from the geometry shader */
+@@ -3727,7 +3727,7 @@ static void si_llvm_emit_primitive(
+ args[0] = lp_build_const_int32(gallivm, SENDMSG_GS_OP_CUT | SENDMSG_GS | (stream << 8));
+ args[1] = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_GS_WAVE_ID);
+ lp_build_intrinsic(gallivm->builder, "llvm.SI.sendmsg",
+- ctx->voidt, args, 2, LLVMNoUnwindAttribute);
++ ctx->voidt, args, 2, LP_FUNC_ATTR_NOUNWIND);
+ }
+
+ static void si_llvm_emit_barrier(const struct lp_build_tgsi_action *action,
+@@ -3740,7 +3740,7 @@ static void si_llvm_emit_barrier(const s
+ lp_build_intrinsic(gallivm->builder,
+ HAVE_LLVM >= 0x0309 ? "llvm.amdgcn.s.barrier"
+ : "llvm.AMDGPU.barrier.local",
+- ctx->voidt, NULL, 0, LLVMNoUnwindAttribute);
++ ctx->voidt, NULL, 0, LP_FUNC_ATTR_NOUNWIND);
+ }
+
+ static const struct lp_build_tgsi_action tex_action = {
+@@ -3771,9 +3771,9 @@ static void si_create_function(struct si
+ /* We tell llvm that array inputs are passed by value to allow Sinking pass
+ * to move load. Inputs are constant so this is fine. */
+ if (i <= last_array_pointer)
+- LLVMAddAttribute(P, LLVMByValAttribute);
++ lp_add_function_attr(ctx->radeon_bld.main_fn, i + 1, LP_FUNC_ATTR_BYVAL);
+ else
+- LLVMAddAttribute(P, LLVMInRegAttribute);
++ lp_add_function_attr(ctx->radeon_bld.main_fn, i + 1, LP_FUNC_ATTR_INREG);
+ }
+ }
+
+@@ -4699,7 +4699,7 @@ static int si_generate_gs_copy_shader(st
+ lp_build_intrinsic(gallivm->builder,
+ "llvm.SI.buffer.load.dword.i32.i32",
+ ctx->i32, args, 9,
+- LLVMReadOnlyAttribute | LLVMNoUnwindAttribute),
++ LP_FUNC_ATTR_READONLY),
+ ctx->f32, "");
+ }
+ }
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