Subject: make's processing of dynamic dependencies
To: None <>
From: David Laight <>
List: tech-userlevel
Date: 10/19/2006 21:46:52
Netbsd's make supports deferred dependencies (not actually documented)
and shell wildcards in dependencies.  So given the following:

a1: x$(b1)

a2: x$$(b2)

b1 = c1
b2 = c2

'a1' depends on 'x' because 'b1' is undefined when the file is scanned,
but 'a2' depends on 'xc2' because the '$$(b2)' is converted to '$(b2)'
during the initial parsing, then expanded to 'c2' after all the makefile
has been read (shell wildcards are handed at the same time).

This is all useful and fine...

However consider the following:

a3: $$(b3)

b3 = $$(c3)
c3 = d3

Here the initial scan converts '$$(b3)' to '$(b3)', the dynamic dependency
code (SuffExpandChildren in suff.c) first converts it to '$(c3)', and
then expands it again to give 'd3'.
I'm fairly sure this latter expansion is unintentional and not useful.
The same repeated expansion occurs for filename expansion.

In particular:
- you cannot get a $ into a filename
- pathnames found by filename expansion are subject to both variable expansion
  and filename expansion - any deliberate use of this is warped beyond belief.
- if a directory contains files 'a.c' and 'a*.c' then make will expand 'a*.c'

I suspect this comes about by the way the code implements filename expansion
after the variable expansion - which is probably useful.

Unless anyone can see a good reason for keeping the status quo, I'll commit
changes that remove the repeated expansions.


David Laight: