On Wed, Jun 15, 2005 at 07:50:28AM +0100, David Laight wrote:
> However some architectures (eg sparc) do not give you the required 
> sequencing of reads and writes - so any such attempt is doomed to failure.

Doesn't the Load-Link / Store Conditional allow exactly that?
Sorry, didn't have time for assembly on my sparc book yet :)

Joerg