Subject: Re: ingres and atomicity
To: None <>
From: der Mouse <mouse@Rodents.Montreal.QC.CA>
List: tech-userlevel
Date: 06/15/2005 14:10:41
>> [...] assumptions (basically, that you have a data type holding at
>> least one bit of information which can be read and written such that
>> reads and writes appear to occur atomically in some order), [...]
> [S]ome architectures (eg sparc) do not give you the required
> sequencing of reads and writes - so any such attempt is doomed to
> failure.

I thought every architecture provided a way to get it.  (Architectures
with memory-mapped device registers more or less have to.)  Even if you
have to call into the kernel to get, say, a page of data marked
non-cacheable, and it's memory which is slower than usual to access,
then you can use it for locking without needing to call into the kernel
for lock operations.  (A syscall per lock operation would be too slow
for mnay applications.  One overhead syscall probably isn't.)

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