Subject: Re: New possibility to move "obj" logic *out* of make(1)
To: None <>
From: Todd Vierling <>
List: tech-userlevel
Date: 10/31/2001 09:18:01
On Wed, 31 Oct 2001, Todd Vierling wrote:

: Note that the one upshot of moving all objdir handling to <> does
: have one noticeable impact:  pre-evaluating variables (using := or !=), or
: dependency rules, containing an explicit ${.OBJDIR} before including
: <>, will probably evaluate to the wrong thing.  However, typically
: an explicit ${.OBJDIR} is not needed, and I am running a full-text grep on
: the source tree to find the locations where this can be fixed in our tree.

Let me clarify a confusion that has already been noted:

This effect only applies to explicit evaluation of ${.OBJDIR} by the parser
before <> is included.  This only happes in three cases:

VARNAME:=	value
VARNAME!=	value
targetname: value

If "value" above contains ${.OBJDIR} (directly or indirectly), it is
evaluated during the Makefile parsing, rather than during building, and thus
will evaluate to the value of ${.OBJDIR} at the moment that Makefile line
is reached.  However, the standard cases:

VARNAME=	value
VARNAME+=	value
	(a command inside a make rule, containing value)

are not evaluated until all Makefiles and included Makefile fragments have
been read and parsed.  In most cases, the explicit references we have to
${.OBJDIR} are one of these latter three cases.

Now, since make actually chdir()s to the .OBJDIR, in most cases an explicit
reference to ${.OBJDIR} is unnecessary, and from what I've seen of the
currently-running grep so far, almost all cases can have the explicit
reference nuked.

-- Todd Vierling <>  *  Wasabi & NetBSD:  Run with it.
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