Subject: Re: memsync/cacheflush proposals: status
To: None <email@example.com>
From: Eduardo E. Horvath <firstname.lastname@example.org>
Date: 02/09/1999 14:19:38
On Tue, 9 Feb 1999, Ignatios Souvatzis wrote:
> On Tue, Feb 09, 1999 at 09:56:49AM -0800, Eduardo E. Horvath wrote:
> > When spinning on a lock the CPU doing the spinning needs to invalidate its
> > D$, and the CPU who grabs/releases the lock needs to force the store of
> > the lock through its D$ and store buffers to RAM.
> Uhm, no. Real CPUs (I've read a lot of PPC documentation in the last year) have
> special primitives to build synchronization code... and were not, you could
> always create a system call to deal with this.
Well SPARCs both have atomic instructions *and* need to use cache
synchronizing code. And spinlocks are simply a special case of the
reader/writer problem. If one CPU writes to a shared memory location,
this sort of synchronization is necessary to ensure other CPUs can see the
results without possible data corruption.
Eduardo Horvath email@example.com
"I need to find a pithy new quote." -- me