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Re: parallel build failure with .c.o rule interrupted mid-step!



At Mon, 24 Feb 2025 23:09:00 +0100, Roland Illig <roland.illig%gmx.de@localhost> wrote:
Subject: Re: parallel build failure with .c.o rule interrupted mid-step!
>
> Am 24.02.2025 um 21:04 schrieb Greg A. Woods:
> > In jobs mode make is supposed to feed the whole rule's script to one
> > invocation of a shell, and in theory that invocation should run to
> > completion even if some other parallel branch of make encounters an
> > error.
>
> That's how it _should_ work.
>
> I made up a little test case (see the attached Makefile), and that test
> fails sometimes when I interrupt it by pressing Ctrl+C.

Hmmm....  One thing may have got confused -- I didn't mean SIGINT --
just that the build was "interrupted", i.e. aborted, by a compilation
failure somewhere in the middle.

I'm trying to replicate this in a test that's very similar in structure
to the default .c.o rule but maybe I'm doing something wrong as the
following doesn't get around to building the .obj files:

# tfail.mk:
#
# Try to demo two-command failure
#
# Run with:
#
#	rm -rf tfail; mkdir -p tfail; cd tfail && make -f ../tfail.mk -j 20; rc=$?; ls -l; exit $rc
#
# When it fails, if it behaves the same as I see in a NetBSD build, then
# there might be an empty .obj and an associated .int file.
#

.SUFFIXES: .src .obj

OBJECT_TARGET	= ${.TARGET}.int
.src.obj:
	[ ${.TARGET} = "obj-3-3.obj" ] && exit 1
	(sleep 1; cat ${.IMPSRC}; ) > ${OBJECT_TARGET}
	cat ${OBJECT_TARGET} > ${.TARGET} && rm -f ${OBJECT_TARGET}

.for _i in 0 1 2 3 4 5 6 7 8 9
FOOS +=	foo-${_i}
SRCS += srcs-${_i}
.for _j in 0 1 2 3 4 5 6 7 8 9
SRCS.${_i} += src-${_i}-${_j}.src
OBJS.${_i} += obj-${_i}-${_j}.obj
.endfor
.endfor

all: .PHONY prods

srcs: .PHONY ${SRCS}

prods: .PHONY srcs
	${MAKE} -f ${MAKEFILE} ${FOOS}

.for _i in 0 1 2 3 4 5 6 7 8 9
foo-${_i}: ${OBJS.${_i}}
	cat ${OBJS.${_i}} > ${.TARGET}

srcs-${_i}: .PHONY
	${MAKE} -f ${MAKEFILE} ${SRCS.${_i}}

.for _j in 0 1 2 3 4 5 6 7 8 9
#
# xxx this shouldn't be necessary, because of the suffix rule, but if it
# is uncommented then make seems to think it is the build rule (and thus
# skips the suffix rule) even though it has no commands!
#
# As-is make doesn't seem to use the suffix rule and just says "don't
# know how to make obj-0-0.obj. Stop" and so on.
#
#obj-${_i}-${_j}.obj: src-${_i}-${_j}.src

src-${_i}-${_j}.src:
	echo ${.TARGET} > ${.TARGET}
.endfor
.endfor


--
					Greg A. Woods <gwoods%acm.org@localhost>

Kelowna, BC     +1 250 762-7675           RoboHack <woods%robohack.ca@localhost>
Planix, Inc. <woods%planix.com@localhost>     Avoncote Farms <woods%avoncote.ca@localhost>

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