Subject: Re: Possible bug in arm32 strongarm optimisations.
To: Mike Pumford <firstname.lastname@example.org>
From: Chris Gilbert <email@example.com>
Date: 10/25/2000 08:50:27
On Wed, 25 Oct 2000, Mike Pumford wrote:
> > Hi,
> > I've been trying to build an arm32 kernel with the -mcpu=strongarm
> > -mtune=strongarm.
> > The problem I've had is that the podulebus doesn't get devices attaching
> > properly. Anyway, after doing some rummaging around in the .s files from
> > a kernel with and without the above options it seems that it's doing the
> > following optimsation:
> > turning:
> > ldr r3, [r5, #6]
> > mov r0, r3, lsr #16
> > into
> > ldrh r0, [r5, #4]
> You have fallen into a slight trap of the RiscPC architecture. Although
> the RiscPC has a StrongARM processor the memory interface does not
> implement 16bit (halfword) transfers. Try the following options:
> -march=armv3m -mtune=strongarm
Doh, I did go looking for docs on the strongarm flags, but there's nothing
the gcc man page about this (perhaps that needs to be pr'd as a docs thing?).
I thought I was probably doing something silly somewhere, hence asking, and
not pr'ing it.