Subject: Re: 1.5S vs sparc
To: Simon J. Gerraty <firstname.lastname@example.org>
From: Paul Kranenburg <email@example.com>
Date: 02/21/2001 12:18:21
> So, I added DDB_* to my sparc/MP config and this is the dmesg and
> stack when we hit the panic in lockmgr.
This is a known issue with MP kernels on hypersparc machines. Here's a
previous message on the subject:
>> I get the same thing on a SS10 with a dual Ross 100 MHZ module. It didn't
>> happen, however, when I had two TMS390Z50 in the machine.
>> I presumed that something is not quite ready.
>True. MP hypersparc machines all do this. The problem is in the smp
>version of the cache flush routines: pages must remain mapped in the
>MMU until the page cache flushes are done on all CPUs. Currently,
>the primary CPU races ahead and unmaps a page before the other CPUs
>get around to flushing it from their caches.
>At least that's my current conjecture on this issue.