Subject: IPI interface..
To: Toru Nishimura <email@example.com>
From: Bill Sommerfeld <firstname.lastname@example.org>
Date: 03/21/2000 22:28:00
> This is rather interesting in respect to having MI SMP framework
> common across various NetBSD ports.
> I have been thinking around how IPI (inter-processor interrupt)
> notification can be organized, specifically for NetBSD/luna88k and MP
> NetBSD/arc. Isn't it better to continue the discussion in tech-smp?
It's not immediately clear to me what MI uses there would be for
IPI's, at least at first (in the initial big-lock SMP case).. having
an MI interface for MD functionality which is only called from MD code
seems like it unnecessarily constrains the implementation of the MD
part of the code.
Note that I'd rather see separate defined functions for:
- send IPI to specific cpu
- send IPI to self
- send IPI to all cpus including self
- send IPI to all cpus excluding self..
i.e., i'd like to avoid the use of "magic" CPU numbers for the various
broadcast cases, to avoid excessive code explosion if the "send-ipi"
operation is inlined. On an x86 using the Intel MP spec, each of the
last three turn into a single write of a 32-bit constant to a fixed
memory location, and that should be inlineable; the first winds up
being two writes.