Subject: Re: more on the i386 MP CPU spinup code..
To: None <firstname.lastname@example.org>
From: Eric Delcamp <e.delcamp.NO_SPAM@wanadoo.fr>
Date: 02/22/2000 23:12:46
I'm waiting your boot floppy images to test on a quad-PII xeon !
Lastest try (2 months ago) failed.
I'm really interested (but need to wait before rebooting the Metaframe
----- Message d'origine -----
De : Bill Sommerfeld <email@example.com>
À : <firstname.lastname@example.org>; <email@example.com>
Envoyé : mardi 22 février 2000 14:29
Objet : more on the i386 MP CPU spinup code..
> All of my work so far on i386 MP spinup code are now checked in to the
> sommerfeld_i386mp_1 branch. I'm chasing down a few bugs and
> incomplete bits of implementation; it works on my ABIT BP6 (dual
> celeron) system but based on some preliminary reports there are a few
> issues on other systems.
> Significant known bugs:
> - doesn't work if boot cpu is not at apic id 0.
> - support needed for dynamic interrupt allocation isn't quite there yet.
> (so pcmcia and cardbus won't work right).
> - ioapic without MULTIPROCESSOR doesn't seem to work at the moment
> and, of course, I've got a TODO list of little nits about a mile long..
> How to try it out:
> a) wait for me to build -current+i386mp GENERIC.MP and INSTALL.MP
> kernels and boot floppy images and put them up on ftp.netbsd.org (in
> the not too distant future), or